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公开(公告)号：US07595241B2
公开(公告)日：2009-09-29
申请号：US11466488
申请日：2006-08-23
申请人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号：US20080050876A1
公开(公告)日：2008-02-28
申请号：US11466488
申请日：2006-08-23
申请人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号：US20090267141A1
公开(公告)日：2009-10-29
申请号：US12498630
申请日：2009-07-07
申请人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人： Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号：US20090159896A1
公开(公告)日：2009-06-25
申请号：US11960785
申请日：2007-12-20
IPC分类号： H01L21/265 , H01L21/336 , H01L29/24
CPC分类号： H01L29/7802 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要： A method of making a silicon carbide MOSFET is disclosed. The method includes providing a semiconductor device structure, wherein the device structure comprises a silicon carbide semiconductor device layer, an ion implanted well region of a first conductivity type formed in the semiconductor device layer, an ion implanted source region of a second conductivity type formed into the ion implanted well region; providing a mask layer over the semiconductor device layer, the mask layer exposing a portion of the ion implanted source region, then etching through the portion of the ion implanted source region to form a dimple; then implanting ions through the dimple to form a high dopant concentration first conductivity type ion implanted contact region, wherein the ion implanted contact region is deeper than the ion implanted well region; then removing the contact region mask layer and annealing implanted ions.
摘要翻译： 公开了一种制造碳化硅MOSFET的方法。 该方法包括提供半导体器件结构，其中器件结构包括碳化硅半导体器件层，形成在半导体器件层中的第一导电类型的离子注入阱区，形成第二导电类型的离子注入源区 离子注入井区; 在所述半导体器件层上提供掩模层，所述掩模层暴露所述离子注入源区的一部分，然后蚀刻穿过所述离子注入源区的所述部分以形成凹坑; 然后通过所述凹坑注入离子以形成高掺杂浓度的第一导电型离子注入接触区，其中所述离子注入的接触区比所述离子注入的阱区深; 然后去除接触区掩模层并退火注入的离子。
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公开(公告)号：US07691711B2
公开(公告)日：2010-04-06
申请号：US12023369
申请日：2008-01-31
申请人： Zachary Matthew Stum , Kevin Sean Matocha , Jody Alan Fronheiser , Ljubisa Dragoljub Stevanovic
发明人： Zachary Matthew Stum , Kevin Sean Matocha , Jody Alan Fronheiser , Ljubisa Dragoljub Stevanovic
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L29/1095 , H01L29/1608 , H01L29/66068
摘要： A method of forming a vertical MOSFET device includes forming a first trench within a semiconductor layer of a first polarity, the first trench generally defining a well region of a second polarity opposite the first polarity; growing a first epitaxial well layer of the second polarity over the original semiconductor layer; growing a second epitaxial source contact layer of the first polarity over the well layer; forming a second trench through the source contact layer and at least a portion of the well layer; growing a third epitaxial layer of the second polarity over the source contact layer; and planarizing at least the first and second epitaxial layers so as to expose an upper surface of the original semiconductor layer, wherein a top surface of the third epitaxial layer is substantially coplanar with a top surface of the source contact layer prior to ohmic contact formation.
摘要翻译： 形成垂直MOSFET器件的方法包括在第一极性的半导体层内形成第一沟槽，第一沟槽通常限定与第一极性相反的第二极性的阱区; 在原始半导体层上生长出第二极性的第一外延阱层; 在阱层上生长第一极性的第二外延源极接触层; 通过所述源极接触层和所述阱层的至少一部分形成第二沟槽; 在源极接触层上生长第二极性的第三外延层; 以及至少对所述第一外延层和所述第二外延层进行平坦化以暴露所述原始半导体层的上表面，其中所述第三外延层的顶表面在欧姆接触形成之前与所述源极接触层的顶表面基本共面。
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公开(公告)号：US20090194772A1
公开(公告)日：2009-08-06
申请号：US12023369
申请日：2008-01-31
申请人： Zachary Matthew Stum , Kevin Sean Matocha , Jody Alan Fronheiser , Ljubisa Dragoljub Stevanovic
发明人： Zachary Matthew Stum , Kevin Sean Matocha , Jody Alan Fronheiser , Ljubisa Dragoljub Stevanovic
IPC分类号： H01L29/24 , H01L21/336
CPC分类号： H01L29/7802 , H01L29/1095 , H01L29/1608 , H01L29/66068
摘要： A method of forming a vertical MOSFET device includes forming a first trench within a semiconductor layer of a first polarity, the first trench generally defining a well region of a second polarity opposite the first polarity; growing a first epitaxial well layer of the second polarity over the original semiconductor layer; growing a second epitaxial source contact layer of the first polarity over the well layer; forming a second trench through the source contact layer and at least a portion of the well layer; growing a third epitaxial layer of the second polarity over the source contact layer; and planarizing at least the first and second epitaxial layers so as to expose an upper surface of the original semiconductor layer, wherein a top surface of the third epitaxial layer is substantially coplanar with a top surface of the source contact layer prior to ohmic contact formation.
摘要翻译： 形成垂直MOSFET器件的方法包括在第一极性的半导体层内形成第一沟槽，第一沟槽通常限定与第一极性相反的第二极性的阱区; 在原始半导体层上生长第二极性的第一外延阱层; 在阱层上生长第一极性的第二外延源极接触层; 通过所述源极接触层和所述阱层的至少一部分形成第二沟槽; 在源极接触层上生长第二极性的第三外延层; 以及至少对所述第一外延层和所述第二外延层进行平坦化以暴露所述原始半导体层的上表面，其中所述第三外延层的顶表面在欧姆接触形成之前与所述源极接触层的顶表面基本共面。
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公开(公告)号：US20080146004A1
公开(公告)日：2008-06-19
申请号：US11610199
申请日：2006-12-13
CPC分类号： H01L21/0465 , H01L29/66068
摘要： A method for fabricating a SiC MOSFET is disclosed. The method includes growing a SiC epilayer over a substrate, planarizing the SiC epilayer to provide a planarized SiC epilayer, and forming a gate dielectric layer in contact with the planarized epilayer.
摘要翻译： 公开了一种制造SiC MOSFET的方法。 该方法包括在衬底上生长SiC外延层，平面化SiC外延层以提供平坦化的SiC外延层，以及形成与平坦化的外延层接触的栅极电介质层。
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公开(公告)号：US10367089B2
公开(公告)日：2019-07-30
申请号：US13431596
申请日：2012-03-27
申请人： Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
发明人： Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
IPC分类号： H01L21/04 , H01L29/16 , H01L29/45 , H01L29/49 , H01L29/78 , H01L29/739 , H01L29/745
摘要： According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.
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9.发明申请公开(公告)号：US20130075756A1
公开(公告)日：2013-03-28
申请号：US13431596
申请日：2012-03-27
申请人： Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
发明人： Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L21/045 , H01L29/1608 , H01L29/45 , H01L29/4925 , H01L29/4933 , H01L29/7395 , H01L29/7455 , H01L29/7802
摘要： According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.
摘要翻译： 根据一个实施例，一种半导体器件，其具有半导体衬底，该半导体衬底包括碳化硅，栅极设置在第一表面上的衬底的一部分上，漏电极设置在衬底的第二表面上。 设置在栅电极上的电介质层和围绕电介质层设置的补救层，其中补救层配置成减轻负偏压温度不稳定性，保持阈值电压的变化小于约1伏。 源电极设置在补救层上，其中源极电耦合到半导体衬底的接触区域。
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公开(公告)号：US20120153362A1
公开(公告)日：2012-06-21
申请号：US12971188
申请日：2010-12-17
IPC分类号： H01L29/772 , H01L21/265
CPC分类号： H01L29/36 , H01L21/046 , H01L29/1608 , H01L29/66068 , H01L29/7816 , H01L29/7827
摘要： A method comprising, introducing a dopant type into a semiconductor layer to define a well region of the semiconductor layer, the well region comprising a channel region, and introducing a dopant type into the well region to define a multiple implant region substantially coinciding with the well region but excluding the channel region.
摘要翻译： 一种方法，包括：将掺杂剂类型引入到半导体层中以限定所述半导体层的阱区，所述阱区包括沟道区，并且将掺杂剂类型引入所述阱区以限定与所述阱大致重合的多个注入区 但不包括渠道区域。
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