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    Methods of forming isolation trenches including damaging a trench isolation mask
    2.
    发明授权
    Methods of forming isolation trenches including damaging a trench isolation mask 失效
    形成隔离沟槽的方法，包括破坏沟槽隔离掩模

    公开(公告)号：US06329266B1

    公开(公告)日：2001-12-11

    申请号：US09323500

    申请日：1999-06-01

    申请人： Ki-Hyun Hwang ,  Seok-Woo Nam

    发明人： Ki-Hyun Hwang ,  Seok-Woo Nam

    IPC分类号： H01L2176

    CPC分类号： H01L21/76224

    摘要： A method of forming an isolation trench for an integrated circuit device includes forming a trench mask layer on a surface of a semiconductor substrate wherein a portion of the semiconductor substrate is exposed through the trench mask layer. An isolation trench is formed in the exposed portion of the semiconductor substrate, and a nitride liner is formed on surfaces of the isolation trench. A trench isolation layer is formed on the nitride liner wherein the trench isolation layer fills the trench, and the trench mask layer is damaged. The damaged trench mask layer is stripped so that the surface of the semiconductor substrate is exposed.

    摘要翻译： 形成用于集成电路器件的隔离沟槽的方法包括在半导体衬底的表面上形成沟槽掩模层，其中半导体衬底的一部分通过沟槽掩模层露出。 在半导体衬底的暴露部分中形成隔离沟槽，并且在隔离沟槽的表面上形成氮化物衬垫。 在氮化物衬垫上形成沟槽隔离层，其中沟槽隔离层填充沟槽，并且沟槽掩模层被损坏。 将损坏的沟槽掩模层剥离，使得半导体衬底的表面露出。

    Methods of forming integrated circuit capacitors having U-shaped electrodes
    5.
    发明授权
    Methods of forming integrated circuit capacitors having U-shaped electrodes 有权
    形成具有U形电极的集成电路电容器的方法

    公开(公告)号：US06214688B1

    公开(公告)日：2001-04-10

    申请号：US09289347

    申请日：1999-04-09

    申请人： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo

    发明人： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo

    IPC分类号： H01L2120

    CPC分类号： H01L28/91 ,  H01L27/10852 ,  H01L28/84

    摘要： Methods of forming integrated circuit capacitors include the steps of forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate, and then forming second and third electrically insulating layers of different materials on the first electrically insulating layer. A contact hole is then formed to extend through the second and third electrically insulating layers and expose the conductive plug. Next, a conductive layer is formed in the contact hole and on the third electrically insulating layer. A step is then performed to planarize the conductive layer to define a U-shaped electrode in the contact hole. The third electrically insulating layer is then etched-back to expose upper portions of outer sidewalls of the U-shaped electrode, using the second electrically insulating layer as an etch stop layer. However, the second electrically insulating layer is not removed but is left to act as a supporting layer for the U-shaped electrode. This second electrically insulating layer preferably comprises a composite of a nitride layer and an oxide layer. To increase the effective surface area of the U-shaped electrode, an HSG layer may also be formed on the inner and outer sidewalls of the U-shaped electrode.

    摘要翻译： 形成集成电路电容器的方法包括在半导体衬底上形成其中具有导电插塞的第一电绝缘层，然后在第一电绝缘层上形成不同材料的第二和第三电绝缘层的步骤。 然后形成接触孔以延伸穿过第二和第三电绝缘层并暴露导电插塞。 接下来，在接触孔和第三电绝缘层中形成导电层。 然后进行步骤以平坦化导电层以在接触孔中限定U形电极。 然后使用第二电绝缘层作为蚀刻停止层，蚀刻回第三电绝缘层以暴露U形电极的外侧壁的上部。 然而，第二电绝缘层不被去除，而是作为U形电极的支撑层。 该第二电绝缘层优选地包括氮化物层和氧化物层的复合物。 为了增加U形电极的有效表面积，也可以在U形电极的内侧壁和外侧壁上形成HSG层。

    Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces
    7.
    发明授权
    Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces 有权
    具有内表面和内表面粗糙的U形电极的电容器电容器

    公开(公告)号：US06838719B2

    公开(公告)日：2005-01-04

    申请号：US10223751

    申请日：2002-08-20

    申请人： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo ,  Young-Sub Yu ,  Han-Jin Lim

    发明人： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo ,  Young-Sub Yu ,  Han-Jin Lim

    IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108

    CPC分类号： H01L28/91 ,  H01L27/10852 ,  H01L28/84

    摘要： Methods of forming integrated circuit capacitors include the steps of forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate, and then forming second and third electrically insulating layers of different materials on the first electrically insulating layer. A contact hole is then formed to extend through the second and third electrically insulating layers and expose the conductive plug. Next, a conductive layer is formed in the contact hole and on the third electrically insulating layer. A step is then performed to planarize the conductive layer to define a U-shaped electrode in the contact hole. The third electrically insulating layer is then etched-back to expose upper portions of outer sidewalls of the U-shaped electrode, using the second electrically insulating layer as an etch stop layer. However, the second electrically insulating layer is not removed but is left to act as a supporting layer for the U-shaped electrode. This second electrically insulating layer preferably comprises a composite of a nitride layer and an oxide layer. To increase the effective surface area of the U-shaped electrode, an HSG layer may also be formed on the inner and outer sidewalls of the U-shaped electrode.

    Method of oxidizing a silicon substrate and method of forming an oxide layer using the same
    8.
    发明授权
    Method of oxidizing a silicon substrate and method of forming an oxide layer using the same 有权
    氧化硅衬底的方法和使用其形成氧化物层的方法

    公开(公告)号：US07119029B2

    公开(公告)日：2006-10-10

    申请号：US10839501

    申请日：2004-05-05

    申请人： Won-Sik Shin ,  Ki-Hyun Hwang ,  Jung-Hwan Oh ,  Hyeon-Deok Lee ,  Seok-Woo Nam

    发明人： Won-Sik Shin ,  Ki-Hyun Hwang ,  Jung-Hwan Oh ,  Hyeon-Deok Lee ,  Seok-Woo Nam

    IPC分类号： H01L23/48

    CPC分类号： H01L21/02238 ,  C23C8/12 ,  C23C8/28 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/3144

    摘要： In a method of forming an oxide layer, ozone is generated by reacting an oxygen gas having a first flow rate with a nitrogen gas having a second flow rate of more than about 1% of the first flow rate. A reactant including the ozone and nitrogen is provided onto a silicon substrate. A surface of the silicon substrate is oxidized via the reaction of the reactant with silicon in the silicon substrate. The flow rate of the nitrogen gas is increased while ozone serving as an oxidant is formed by reacting the nitrogen gas with the oxygen gas. Thus, the oxide layer or a metal oxide layer including nitrogen may be rapidly formed on the substrate.

    摘要翻译： 在形成氧化物层的方法中，通过使具有第一流量的氧气与具有大于第一流量的约1％的第二流量的氮气反应来生成臭氧。 将包含臭氧和氮的反应物提供到硅衬底上。 硅衬底的表面通过反应物与硅衬底中的硅的反应被氧化。 通过使氮气与氧气反应而形成臭氧作为氧化剂，氮气的流量增加。 因此，可以在衬底上快速形成包含氮的氧化物层或金属氧化物层。

    Methods of forming vertical type semiconductor devices including oxidation target layers
    10.
    发明授权
    Methods of forming vertical type semiconductor devices including oxidation target layers 有权
    形成包括氧化靶层的垂直型半导体器件的方法

    公开(公告)号：US09082659B1

    公开(公告)日：2015-07-14

    申请号：US14643527

    申请日：2015-03-10

    申请人： Phil-Ouk Nam ,  Jun-Kyu Yang ,  Byong-Hyun Jang ,  Ki-Hyun Hwang ,  Jae-Young Ahn

    发明人： Phil-Ouk Nam ,  Jun-Kyu Yang ,  Byong-Hyun Jang ,  Ki-Hyun Hwang ,  Jae-Young Ahn

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/7889 ,  H01L29/7926

    摘要： A vertical type semiconductor device can include a vertical pillar structure that includes a channel pattern with an outer wall. Horizontal insulating structures can be vertically spaced apart from one another along the vertical pillar structure to define first vertical gaps therebetween at first locations away from the outer wall and to define second vertical gaps therebetween at the outer wall, where the second vertical gaps are wider than the first vertical gaps. Horizontal wordline structures can be conformally located in the first and second vertical gaps between the vertically spaced apart horizontal insulating structures, so that the horizontal wordline structures can be vertically thinner across the first vertical gaps than across the second vertical gaps.

    摘要翻译： 垂直型半导体器件可以包括垂直柱结构，其包括具有外壁的沟道图案。 水平绝缘结构可以沿着垂直柱结构彼此垂直间隔开，以在远离外壁的第一位置处限定第一垂直间隙，并且在外壁处限定第二垂直间隙，其中第二垂直间隙宽于 第一垂直间隙。 水平字线结构可以共形地位于垂直间隔开的水平绝缘结构之间的第一和第二垂直间隙中，使得水平字线结构可跨越第一垂直间隙而横跨第二垂直间隙。