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    Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces
    1.
    发明授权
    Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces 有权
    具有内表面和内表面粗糙的U形电极的电容器电容器

    公开(公告)号：US06838719B2

    公开(公告)日：2005-01-04

    申请号：US10223751

    申请日：2002-08-20

    Applicant: Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo ,  Young-Sub Yu ,  Han-Jin Lim

    Inventor： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo ,  Young-Sub Yu ,  Han-Jin Lim

    IPC: H01L21/02 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L28/91 ,  H01L27/10852 ,  H01L28/84

    Abstract: Methods of forming integrated circuit capacitors include the steps of forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate, and then forming second and third electrically insulating layers of different materials on the first electrically insulating layer. A contact hole is then formed to extend through the second and third electrically insulating layers and expose the conductive plug. Next, a conductive layer is formed in the contact hole and on the third electrically insulating layer. A step is then performed to planarize the conductive layer to define a U-shaped electrode in the contact hole. The third electrically insulating layer is then etched-back to expose upper portions of outer sidewalls of the U-shaped electrode, using the second electrically insulating layer as an etch stop layer. However, the second electrically insulating layer is not removed but is left to act as a supporting layer for the U-shaped electrode. This second electrically insulating layer preferably comprises a composite of a nitride layer and an oxide layer. To increase the effective surface area of the U-shaped electrode, an HSG layer may also be formed on the inner and outer sidewalls of the U-shaped electrode.

    Television channel aural display and method thereof
    4.
    发明授权
    Television channel aural display and method thereof 失效
    电视频道听觉显示及其方法

    公开(公告)号：US5701162A

    公开(公告)日：1997-12-23

    申请号：US541773

    申请日：1995-10-10

    Applicant: Chang Won Choi

    Inventor： Chang Won Choi

    IPC: H04N5/64 ,  H04N5/60 ,  H04N5/44

    CPC classification number: H04N21/485 ,  H04N5/44513 ,  H04N5/60

    Abstract: A television channel display comprises remote controller signal receiver for receiving a channel number determined by a user, an MCU for receiving a signal output from the remote controller signal receiver, a memory for storing and outputting audio signals of the channel number and a broadcasting station name according to a control signal output from the MCU, an audio mixer for mixing the audio signal of the channel number and the broadcasting station name output from the memory, an aural processor for processing audio signals of an input broadcasting program, a multiplexer for selecting and outputting the audio signals of the audio mixer and the aural processor under a control of the MCU, and a speaker for converting and outputting audio current outputs from the multiplexer into an audio signal.

    Abstract translation: 电视频道显示器包括用于接收由用户确定的频道号的遥控器信号接收器，用于接收从遥控器信号接收器输出的信号的MCU，用于存储和输出频道号的音频信号的存储器以及广播电台名称 根据从MCU输出的控制信号，混合通道号的音频信号和从存储器输出的广播电台名称的音频混合器，用于处理输入广播节目的音频信号的听觉处理器，用于选择和 在MCU的控制下输出音频混合器和听觉处理器的音频信号，以及用于将音频电流输出从多路复用器转换和输出到音频信号的扬声器。

    METHOD FOR TRANSMITTING AND RECEIVING ETHERNET DATA BETWEEN DIGITAL UNIT AND RF UNIT AND APPARATUS THEREOF
    5.
    发明申请
    METHOD FOR TRANSMITTING AND RECEIVING ETHERNET DATA BETWEEN DIGITAL UNIT AND RF UNIT AND APPARATUS THEREOF 有权
    用于发送和接收数字单元和RF单元之间的以太网数据的方法及其装置

    公开(公告)号：US20110182255A1

    公开(公告)日：2011-07-28

    申请号：US13009353

    申请日：2011-01-19

    Applicant: Keun-Bok KIM ,  Chang-Won KIM ,  Han-Ul MOON ,  Chang-Won CHOI

    Inventor： Keun-Bok KIM ,  Chang-Won KIM ,  Han-Ul MOON ,  Chang-Won CHOI

    IPC: H04W4/00

    CPC classification number: H04W88/085 ,  H04W80/02

    Abstract: A method for transmitting Ethernet data in a Digital Unit (DU) that processes a baseband and interfaces with at least two Radio Frequency (RF) Units (RUs) is provided. The method includes setting location information of two or more Ethernet channels in a first subchannel of a radio frame, allocating the two or more Ethernet channels in second subchannels of the radio frame, using the location information, and transmitting the radio frame to the at least two RUs.

    Abstract translation: 提供了一种在处理基带并与至少两个射频（RF）单元（RU））接口的数字单元（DU）中发送以太网数据的方法。 该方法包括：在无线帧的第一子信道中设置两个或多个以太网信道的位置信息，使用位置信息在无线帧的第二子信道中分配两个或多个以太网信道，并且至少向 两个RU。

    Semiconductor device having chamfered silicide layer and method for manufacturing the same
    8.
    发明授权
    Semiconductor device having chamfered silicide layer and method for manufacturing the same 失效
    具有倒角硅化​​物层的半导体器件及其制造方法

    公开(公告)号：US06437411B1

    公开(公告)日：2002-08-20

    申请号：US09536427

    申请日：2000-03-27

    Applicant: Chang-won Choi ,  Dae-hyuk Chung ,  Woo-sik Kim ,  Shin-woo Nam ,  Yeo-cheol Yoon ,  Bum-su Kim ,  Jong-ho Park ,  Ji-hwan Choi

    Inventor： Chang-won Choi ,  Dae-hyuk Chung ,  Woo-sik Kim ,  Shin-woo Nam ,  Yeo-cheol Yoon ,  Bum-su Kim ,  Jong-ho Park ,  Ji-hwan Choi

    IPC: H01L2976

    CPC classification number: H01L21/02071 ,  H01L21/28114 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/76897 ,  H01L23/5258 ,  H01L29/42376 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device having a chamfered silicide layer and a manufacturing method of the same. The semiconductor device includes: a first insulation layer overlying a semiconductor substrate; gate structures including first conductive layer patterns formed on the first insulation layer, and second conductive layer patterns which are formed on the first conductive layer patterns, wherein the lower sides of the second conductive layer patterns are substantially perpendicular to the major surface of the semiconductor substrate and the upper sides of the second conductive layer patterns are chamfered; and a second insulation layer formed with a first width W on the second conductive layer patterns, wherein the sidewalls of the second insulation layer overhang the upper edges of the second conductive layer patterns. In the semiconductor device manufacture, in forming undercut regions which define the chamfered upper edges of the metal silicide layer patterns, isotropic dry etching is carried out, wherein the isotropic dry etching can be performed simultaneously with ashing of photoresist patterns, or immediately after the ashing process in the same chamber. In either case, after the ashing of the photoresist patterns, an isotropic wet etching can be carried out immediately after performing an existing stripping process, so as to form the undercut regions.

    Abstract translation: 具有倒角硅化​​物层的半导体器件及其制造方法。 半导体器件包括：覆盖半导体衬底的第一绝缘层; 包括形成在第一绝缘层上的第一导电层图案的栅结构和形成在第一导电层图案上的第二导电层图案，其中第二导电层图案的下侧基本垂直于半导体衬底的主表面 并且第二导电层图案的上侧被倒角; 以及在第二导电层图案上形成有第一宽度W的第二绝缘层，其中第二绝缘层的侧壁悬垂在第二导电层图案的上边缘上。 在半导体器件制造中，在形成限定金属硅化物层图案的倒角上边缘的底切区域时，进行各向同性干蚀刻，其中各向同性干蚀刻可以与光致抗蚀剂图案的灰化或灰化之后立即同时进行 过程在同一个房间。 在任一种情况下，在光致抗蚀剂图案的灰化之后，可以在执行现有的剥离工艺之后立即进行各向同性的湿蚀刻，以形成底切区域。

    Methods of forming integrated circuit capacitors having U-shaped electrodes
    9.
    发明授权
    Methods of forming integrated circuit capacitors having U-shaped electrodes 有权
    形成具有U形电极的集成电路电容器的方法

    公开(公告)号：US06214688B1

    公开(公告)日：2001-04-10

    申请号：US09289347

    申请日：1999-04-09

    Applicant: Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo

    Inventor： Ki-Hyun Hwang ,  Chang-Won Choi ,  Seok-Woo Nam ,  Bon-Young Koo

    IPC: H01L2120

    CPC classification number: H01L28/91 ,  H01L27/10852 ,  H01L28/84

    Abstract: Methods of forming integrated circuit capacitors include the steps of forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate, and then forming second and third electrically insulating layers of different materials on the first electrically insulating layer. A contact hole is then formed to extend through the second and third electrically insulating layers and expose the conductive plug. Next, a conductive layer is formed in the contact hole and on the third electrically insulating layer. A step is then performed to planarize the conductive layer to define a U-shaped electrode in the contact hole. The third electrically insulating layer is then etched-back to expose upper portions of outer sidewalls of the U-shaped electrode, using the second electrically insulating layer as an etch stop layer. However, the second electrically insulating layer is not removed but is left to act as a supporting layer for the U-shaped electrode. This second electrically insulating layer preferably comprises a composite of a nitride layer and an oxide layer. To increase the effective surface area of the U-shaped electrode, an HSG layer may also be formed on the inner and outer sidewalls of the U-shaped electrode.

    Abstract translation: 形成集成电路电容器的方法包括在半导体衬底上形成其中具有导电插塞的第一电绝缘层，然后在第一电绝缘层上形成不同材料的第二和第三电绝缘层的步骤。 然后形成接触孔以延伸穿过第二和第三电绝缘层并暴露导电插塞。 接下来，在接触孔和第三电绝缘层中形成导电层。 然后进行步骤以平坦化导电层以在接触孔中限定U形电极。 然后使用第二电绝缘层作为蚀刻停止层，蚀刻回第三电绝缘层以暴露U形电极的外侧壁的上部。 然而，第二电绝缘层不被去除，而是作为U形电极的支撑层。 该第二电绝缘层优选地包括氮化物层和氧化物层的复合物。 为了增加U形电极的有效表面积，也可以在U形电极的内侧壁和外侧壁上形成HSG层。

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