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公开(公告)号:US20240097658A1
公开(公告)日:2024-03-21
申请号:US18178038
申请日:2023-03-03
Applicant: Kioxia Corporation
Inventor: Fumiya WATANABE , Toshifumi WATANABE , Kazuhiko SATOU , Shouichi OZAKI , Kenro KUBOTA , Atsuko SAEKI , Ryota TSUCHIYA , Harumi ABE
CPC classification number: H03K3/011 , G11C7/1048 , H03K17/14 , G11C2207/2254 , H03K19/20
Abstract: A semiconductor device includes a first pad, a second pad, a first output driver provided for the first pad and configured to output a first transmission signal to the first pad, a second output driver provided for the second pad and configured to output a second transmission signal to the second pad, a register that stores first and second calibration values, a first reference resistor for the first pad and having a resistance value that is set according to the first calibration value, a second reference resistor for the second pad and having a resistance value that is set according to the second calibration value, a first setting circuit configured to calibrate a resistance value of the first output driver using the first reference resistor, and a second setting circuit configured to calibrate a resistance value of the second output driver using the second reference resistor.
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公开(公告)号:US20240313776A1
公开(公告)日:2024-09-19
申请号:US18594589
申请日:2024-03-04
Applicant: Kioxia Corporation
Inventor: Fumiya WATANABE , Kazuhiko SATOU , Kenro KUBOTA , Atsuko SAEKI , Ryota TSUCHIYA , Harumi ABE , Kanta NAGUMO
IPC: H03K19/00 , H03K19/003 , H03K19/0185
CPC classification number: H03K19/0005 , H03K19/00384 , H03K19/018557
Abstract: A semiconductor device includes a first circuit, a first pad, a first comparator, a second comparator, and a control circuit. The first circuit is configured to pull up a voltage of a first node, and includes a plurality of first transistors connected in parallel to the first node. The first pad is connected to the first node. The first comparator is configured to compare a voltage of the first node with a first reference voltage. The second comparator is configured to compare the voltage of the first node with a second reference voltage. The control circuit is configured to control the plurality of first transistors based on an output of the first comparator and an output of the second comparator.
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公开(公告)号:US20240079067A1
公开(公告)日:2024-03-07
申请号:US18176442
申请日:2023-02-28
Applicant: Kioxia Corporation
Inventor: Shouichi OZAKI , Kazuhiko SATOU , Kenro KUBOTA , Fumiya WATANABE , Atsuko SAEKI , Ryota TSUCHIYA , Harumi ABE , Toshifumi WATANABE
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/10 , G11C16/32
Abstract: A semiconductor memory device includes an output pin configured for connection with a memory controller, an output circuit configured to output through the output pin a voltage signal that changes over time in accordance with one or more bits of data to be output to the memory controller, and a control circuit configured to temporarily change a drive capability of the output circuit each time a voltage signal corresponding to one bit of the data is output through the output pin.
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