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1.发明授权Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers 有权通过改变应力介电覆盖层的去除速率，在替代浇口方法中暴露占位符材料的技术公开(公告)号：US08247281B2
公开(公告)日：2012-08-21
申请号：US12822789
申请日：2010-06-24
IPC分类号： H01L21/8238
CPC分类号： H01L21/823425 , H01L21/31055 , H01L21/31111 , H01L21/76825 , H01L21/76829 , H01L21/7684 , H01L21/823412 , H01L21/823807 , H01L29/7843
摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.
摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。
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2.发明申请TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS 有权通过修改压电介质覆盖层的去除速率来更换替代门方法中的位置材料的技术公开(公告)号：US20120282764A1
公开(公告)日：2012-11-08
申请号：US13550435
申请日：2012-07-16
IPC分类号： H01L21/283 , H01L21/302
CPC分类号： H01L21/823425 , H01L21/31055 , H01L21/31111 , H01L21/76825 , H01L21/76829 , H01L21/7684 , H01L21/823412 , H01L21/823807 , H01L29/7843
摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.
摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。
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3.发明授权Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers 有权通过改变应力介电覆盖层的去除速率，在替代浇口方法中暴露占位符材料的技术公开(公告)号：US08357575B2
公开(公告)日：2013-01-22
申请号：US13550435
申请日：2012-07-16
IPC分类号： H01L21/8238
CPC分类号： H01L21/823425 , H01L21/31055 , H01L21/31111 , H01L21/76825 , H01L21/76829 , H01L21/7684 , H01L21/823412 , H01L21/823807 , H01L29/7843
摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.
摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。
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4.发明申请TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS 有权通过修改压电介质覆盖层的去除速率来更换替代门方法中的位置材料的技术公开(公告)号：US20100330790A1
公开(公告)日：2010-12-30
申请号：US12822789
申请日：2010-06-24
IPC分类号： H01L21/8238
CPC分类号： H01L21/823425 , H01L21/31055 , H01L21/31111 , H01L21/76825 , H01L21/76829 , H01L21/7684 , H01L21/823412 , H01L21/823807 , H01L29/7843
摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.
摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。
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5.发明申请WORK FUNCTION ADJUSTMENT IN HIGH-K METAL GATE ELECTRODE STRUCTURES BY SELECTIVELY REMOVING A BARRIER LAYER 有权通过选择性去除障碍层，高K金属电极结构的工作功能调整公开(公告)号：US20100301427A1
公开(公告)日：2010-12-02
申请号：US12785185
申请日：2010-05-21
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/82345 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833 , H01L29/7843
摘要： In a replacement gate approach in sophisticated semiconductor devices, a tantalum nitride etch stop material may be efficiently removed on the basis of a wet chemical etch recipe using ammonium hydroxide. Consequently, a further work function adjusting material may be formed with superior uniformity, while the efficiency of the subsequent adjusting of the work function may also be increased. Thus, superior uniformity, i.e., less pronounced transistor variability, may be accomplished on the basis of a replacement gate approach in which the work function of the gate electrodes of P-channel transistors and N-channel transistors is adjusted after completing the basic transistor configuration.
摘要翻译： 在复杂半导体器件中的替代栅极方法中，可以基于使用氢氧化铵的湿化学蚀刻配方有效地去除氮化钽蚀刻停止材料。 因此，可以形成具有优异均匀性的另外的功能调节材料，同时可以提高随后的功函数调整的效率。 因此，可以在替代栅极方法的基础上实现优异的均匀性，即较不明显的晶体管可变性，其中在完成基本晶体管配置之后调节P沟道晶体管和N沟道晶体管的栅电极的功函数 。
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6.发明授权Work function adjustment in high-k metal gate electrode structures by selectively removing a barrier layer 有权通过选择性去除阻挡层，在高k金属栅电极结构中进行功函数调整公开(公告)号：US08298894B2
公开(公告)日：2012-10-30
申请号：US12785185
申请日：2010-05-21
IPC分类号： H01L21/8234
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/82345 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833 , H01L29/7843
摘要： In a replacement gate approach in sophisticated semiconductor devices, a tantalum nitride etch stop material may be efficiently removed on the basis of a wet chemical etch recipe using ammonium hydroxide. Consequently, a further work function adjusting material may be formed with superior uniformity, while the efficiency of the subsequent adjusting of the work function may also be increased. Thus, superior uniformity, i.e., less pronounced transistor variability, may be accomplished on the basis of a replacement gate approach in which the work function of the gate electrodes of P-channel transistors and N-channel transistors is adjusted after completing the basic transistor configuration.
摘要翻译： 在复杂半导体器件中的替代栅极方法中，可以基于使用氢氧化铵的湿化学蚀刻配方有效地去除氮化钽蚀刻停止材料。 因此，可以形成具有优异均匀性的另外的功能调节材料，同时可以提高随后的功函数调整的效率。 因此，可以在替代栅极方法的基础上实现优异的均匀性，即较不明显的晶体管可变性，其中在完成基本晶体管配置之后调节P沟道晶体管和N沟道晶体管的栅电极的功函数 。
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7.发明授权High-k metal gate electrode structures formed by reducing a gate fill aspect ratio in replacement gate technology 有权通过减少替代栅极技术中的栅极填充长宽比形成的高k金属栅电极结构公开(公告)号：US08716120B2
公开(公告)日：2014-05-06
申请号：US13489539
申请日：2012-06-06
申请人： Klaus Hempel , Andy Wei , Martin Mazur
发明人： Klaus Hempel , Andy Wei , Martin Mazur
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/823842
摘要： When forming sophisticated high-k metal gate electrode structures on the basis of a replacement gate approach, the fill conditions upon filling in the highly conductive electrode metal, such as aluminum, may be enhanced by removing an upper portion of the final work function metal, for instance a titanium nitride material in P-channel transistors. In some illustrative embodiments, the selective removal of the metal-containing electrode material in an upper portion of the gate opening may be accomplished without unduly increasing overall process complexity.
摘要翻译： 当在更换栅极方法的基础上形成复杂的高k金属栅电极结构时，填充高导电电极金属（例如铝）时的填充条件可以通过去除最终功函数金属的上部来增强， 例如P沟道晶体管中的氮化钛材料。 在一些说明性实施例中，可以在门开口的上部中选择性地去除含金属的电极材料，而不会过度增加整个工艺的复杂性。
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公开(公告)号：US20130302974A1
公开(公告)日：2013-11-14
申请号：US13466247
申请日：2012-05-08
申请人： Jens Hahn , Torsten Huisinga , Klaus Hempel , Oisin Kenny
发明人： Jens Hahn , Torsten Huisinga , Klaus Hempel , Oisin Kenny
IPC分类号： H01L21/283
CPC分类号： H01L29/66545 , H01L21/28088 , H01L21/823842
摘要： Generally, the present disclosure is directed to forming conductive metal fill materials in replacement gate electrodes using reduced deposition temperatures. One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor layer, the sacrificial gate structure including a dummy gate electrode, and forming a gate cavity by removing at least the dummy gate electrode from above the semiconductor layer. The disclosed method further includes forming a work-function material of a replacement metal gate electrode in the gate cavity, and forming a conductive metal fill material in the gate cavity and above the work-function material, wherein forming the conductive metal fill material includes performing a material deposition process at a temperature below approximately 450° C.
摘要翻译： 通常，本公开涉及使用降低的沉积温度在置换栅电极中形成导电金属填充材料。 本文公开的一种说明性方法包括在半导体层之上形成牺牲栅极结构，牺牲栅极结构包括伪栅电极，以及通过从半导体层上方去除至少虚拟栅极电极而形成栅极腔。 所公开的方法还包括在栅腔中形成替代金属栅电极的功函件材料，并且在栅腔中形成导电金属填充材料并在功函材料之上形成导电金属填充材料，其中形成导电金属填充材料包括执行 在低于约450℃的温度下的材料沉积工艺
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9.发明申请INCREASING STABILITY OF A HIGH-K GATE DIELECTRIC OF A HIGH-K GATE STACK BY AN OXYGEN RICH TITANIUM NITRIDE CAP LAYER 审中-公开一种富含硝酸铁的硝酸盐层的高K栅极堆叠的高K栅介质的稳定性提高公开(公告)号：US20110127590A1
公开(公告)日：2011-06-02
申请号：US12901631
申请日：2010-10-11
申请人： Robert Binder , Joachim Metzger , Klaus Hempel
发明人： Robert Binder , Joachim Metzger , Klaus Hempel
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L21/28088 , H01L21/28247 , H01L21/321 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/7848
摘要： In a replacement gate approach, the oxygen contents of a cap material may be increased, thereby providing more stable characteristics of the cap material itself and of the high-k dielectric material. Consequently, upon providing a work function adjusting metal species at a very advanced manufacturing stage, corresponding additional treatments may be reduced in number or may even be completely avoided, while at the same time threshold voltage variations may be reduced.
摘要翻译： 在替代栅极方法中，可以增加盖材料的氧含量，从而提供帽材料本身和高k电介质材料的更稳定的特性。 因此，在提供在非常先进的制造阶段调整金属种类的功函数时，相应的附加处理可能数量减少或甚至可以完全避免，同时阈值电压变化可能会降低。
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10.发明申请公开(公告)号：US20100244141A1
公开(公告)日：2010-09-30
申请号：US12749112
申请日：2010-03-29
申请人： Sven Beyer , Markus Lenski , Richard Carter , Klaus Hempel
发明人： Sven Beyer , Markus Lenski , Richard Carter , Klaus Hempel
IPC分类号： H01L27/092 , H01L21/8234 , H01L21/28
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/84 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/7833
摘要： During the formation of sophisticated gate electrode structures, a replacement gate approach may be applied in which plasma assisted etch processes may be avoided. To this end, one of the gate electrode structures may receive an intermediate etch stop liner, which may allow the replacement of the placeholder material and the adjustment of the work function in a later manufacturing stage. The intermediate etch stop liner may not negatively affect the gate patterning sequence.
摘要翻译： 在复杂的栅电极结构的形成期间，可以应用替代栅极方法，其中可以避免等离子体辅助蚀刻工艺。 为此，栅极电极结构之一可以接收中间蚀刻停止衬垫，其可以允许在稍后的制造阶段更换占位符材料和调整功能。 中间蚀刻停止衬垫可能不会对栅极图案化顺序产生负面影响。
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