公开(公告)号：US07786485B2

公开(公告)日：2010-08-31

申请号：US12390144

申请日：2009-02-20

申请人： Koji Dairiki ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Shunpei Yamazaki ,  Hiromichi Godo ,  Daisuke Kawae ,  Satoshi Kobayashi

发明人： Koji Dairiki ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Shunpei Yamazaki ,  Hiromichi Godo ,  Daisuke Kawae ,  Satoshi Kobayashi

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/15

CPC分类号： H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765

摘要： A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over the gate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.

摘要翻译： 薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极区和漏极区，以至少部分地与栅电极重叠，栅极绝缘层介于 栅电极和杂质半导体层; 一对导电层，其至少部分地与所述栅电极和所述杂质半导体层重叠在所述栅极绝缘层上方，并且在沟道长度方向上设置有间隔; 以及与所述栅极绝缘层和所述一对导电层接触并在所述一对导电层之间延伸的非晶半导体层。

公开(公告)号：US07812348B2

公开(公告)日：2010-10-12

申请号：US12390954

申请日：2009-02-23

申请人： Koji Dairiki ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Shunpei Yamazaki ,  Hiromichi Godo ,  Daisuke Kawae ,  Satoshi Kobayashi

发明人： Koji Dairiki ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Shunpei Yamazaki ,  Hiromichi Godo ,  Daisuke Kawae ,  Satoshi Kobayashi

IPC分类号： H01L27/14

CPC分类号： H01L29/78609 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/78669

摘要： A thin-film transistor in which problems with ON-state current and OFF-state current are solved, and a thin-film transistor capable of high-speed operation. The thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions, provided with a space therebetween so as to be overlapped with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of semiconductor layers in which an impurity element which serves as an acceptor is added, overlapped over the gate insulating layers with the gate electrode and the impurity semiconductor layers, and disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer being in contact with the gate insulating layer and the pair of semiconductor layers and extended between the pair of semiconductor layers.

摘要翻译： 解决了导通状态电流和截止电流的问题的薄膜晶体管，以及能够进行高速运转的薄膜晶体管。 薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极和漏极区域，其间具有间隔，以便与具有栅极绝缘层的栅电极重叠 插入在栅电极和杂质半导体层之间; 添加作为受体的杂质元素的一对半导体层，与栅极电极和杂质半导体层重叠在栅极绝缘层上，并且在沟道长度方向上间隔设置; 以及与所述栅绝缘层和所述一对半导体层接触并在所述一对半导体层之间延伸的非晶半导体层。

公开(公告)号：US07968880B2

公开(公告)日：2011-06-28

申请号：US12391398

申请日：2009-02-24

申请人： Koji Dairiki ,  Takayuki Ikeda ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Daisuke Kawae ,  Takayuki Inoue ,  Satoshi Kobayashi

发明人： Koji Dairiki ,  Takayuki Ikeda ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Daisuke Kawae ,  Takayuki Inoue ,  Satoshi Kobayashi

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

摘要翻译： 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US08618544B2

公开(公告)日：2013-12-31

申请号：US13167762

申请日：2011-06-24

申请人： Koji Dairiki ,  Takayuki Ikeda ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Daisuke Kawae ,  Takayuki Inoue ,  Satoshi Kobayashi

发明人： Koji Dairiki ,  Takayuki Ikeda ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Daisuke Kawae ,  Takayuki Inoue ,  Satoshi Kobayashi

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

摘要翻译： 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US08624321B2

公开(公告)日：2014-01-07

申请号：US12398295

申请日：2009-03-05

申请人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Hidekazu Miyairi

发明人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Hiromichi Godo ,  Hidekazu Miyairi

IPC分类号： H01L23/62

CPC分类号： H01L29/78696 ,  H01L29/04 ,  H01L29/66765

摘要： A thin film transistor is provided, which includes a gate insulating layer covering a gate electrode, a microcrystalline semiconductor layer provided over the gate insulating layer, an amorphous semiconductor layer overlapping the microcrystalline semiconductor layer and the gate insulating layer, and a pair of impurity semiconductor layers which are provided over the amorphous semiconductor layer and to which an impurity element imparting one conductivity type is added to form a source region and a drain region. The gate insulating layer has a step adjacent to a portion in contact with an end portion of the microcrystalline semiconductor layer. A second thickness of the gate insulating layer in a portion outside the microcrystalline semiconductor layer is smaller than a first thickness thereof in a portion in contact with the microcrystalline semiconductor layer.

摘要翻译： 提供一种薄膜晶体管，其包括覆盖栅极的栅极绝缘层，设置在栅极绝缘层上的微晶半导体层，与微晶半导体层和栅极绝缘层重叠的非晶半导体层，以及一对杂质半导体 提供在非晶半导体层上并且添加赋予一种导电类型的杂质元素以形成源区和漏区的层。 栅极绝缘层具有与微晶半导体层的端部接触的部分相邻的台阶。 在与微晶半导体层接触的部分中，微晶半导体层外部的栅极绝缘层的第二厚度小于其第一厚度。

公开(公告)号：US08120030B2

公开(公告)日：2012-02-21

申请号：US12633067

申请日：2009-12-08

申请人： Hiromichi Godo ,  Satoshi Kobayashi ,  Hidekazu Miyairi ,  Toshiyuki Isa ,  Shunpei Yamazaki

发明人： Hiromichi Godo ,  Satoshi Kobayashi ,  Hidekazu Miyairi ,  Toshiyuki Isa ,  Shunpei Yamazaki

IPC分类号： H01L29/04

CPC分类号： H01L29/78696 ,  H01L27/12 ,  H01L29/04

摘要： Off current of a bottom gate thin film transistor in which a semiconductor layer is shielded from light by a gate electrode is reduced. A thin film transistor includes a gate electrode layer; a first semiconductor layer; a second semiconductor layer, provided on and in contact with the first semiconductor layer; a gate insulating layer between and in contact with the gate electrode layer and the first semiconductor layer; impurity semiconductor layers in contact with the second semiconductor layer; and source and drain electrode layers partially in contact with the impurity semiconductor layers and the first and second semiconductor layers. The entire surface of the first semiconductor layer on the gate electrode layer side is covered by the gate electrode layer; and a potential barrier at a portion where the first semiconductor layer is in contact with the source or drain electrode layer is 0.5 eV or more.

摘要翻译： 其中半导体层被栅极电极遮挡光的底栅薄膜晶体管的截止电流减小。 薄膜晶体管包括栅电极层; 第一半导体层; 第二半导体层，设置在第一半导体层上并与第一半导体层接触; 在栅极电极层和第一半导体层之间并与之接触的栅极绝缘层; 与第二半导体层接触的杂质半导体层; 以及与杂质半导体层和第一和第二半导体层部分接触的源极和漏极电极层。 栅极电极层侧的第一半导体层的整个表面被栅电极层覆盖; 并且在第一半导体层与源极或漏极电极层接触的部分处的势垒为0.5eV以上。

公开(公告)号：US09176353B2

公开(公告)日：2015-11-03

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/67

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  H01L21/67207 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US20090002591A1

公开(公告)日：2009-01-01

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabrara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabrara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  H01L21/67207 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

摘要翻译： 本发明的目的是提出具有高质量生产率的液晶显示装置的制造方法，其具有具有高可靠电特性的薄膜晶体管。 在具有反交错薄膜晶体管的液晶显示装置中，反交错薄膜晶体管形成如下：在栅电极上形成栅极绝缘膜; 在栅绝缘膜上形成用作沟道形成区的微晶半导体膜; 在微晶半导体膜上形成缓冲层; 在缓冲层上形成一对源区和漏区; 并且形成与源区和漏区接触的一对源电极和漏电极，以便露出源区和漏区的一部分。

公开(公告)号：US09057924B2

公开(公告)日：2015-06-16

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/67

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US09000441B2

公开(公告)日：2015-04-07

申请号：US12504897

申请日：2009-07-17

申请人： Daisuke Kawae ,  Yoshiyuki Kurokawa ,  Hidekazu Miyairi

发明人： Daisuke Kawae ,  Yoshiyuki Kurokawa ,  Hidekazu Miyairi

IPC分类号： H01L27/14 ,  H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/66

CPC分类号： H01L29/78696 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78645

摘要： A thin film transistor whose threshold voltage can be controlled and which has a favorable switching characteristic is provided. The thin film transistor includes a first gate electrode layer; a semiconductor layer; a first gate insulating layer provided between the first gate electrode layer and the semiconductor layer; source electrode and drain electrode layers which are provided over the semiconductor layer; a conductive layer covered by the first gate insulating layer and the semiconductor layer and provided so as to overlap with part of the first gate electrode layer; a second gate insulating layer provided so as to cover at least a back channel portion of the semiconductor layer; and a second gate electrode layer provided over the second gate insulating layer so as to overlap with the back channel portion of the semiconductor layer.

摘要翻译： 提供了可以控制阈值电压并具有良好的开关特性的薄膜晶体管。 薄膜晶体管包括第一栅电极层; 半导体层; 设置在所述第一栅极电极层和所述半导体层之间的第一栅极绝缘层; 源电极和漏极电极层，设置在半导体层上; 由第一栅极绝缘层和半导体层覆盖的导电层，并且设置成与第一栅极电极层的一部分重叠; 第二栅极绝缘层，设置成覆盖半导体层的至少后沟道部分; 以及第二栅极电极层，设置在所述第二栅极绝缘层上方以与所述半导体层的所述后部沟道部重叠。