Hearing auxiliary device and hearing auxiliary processing method

    公开(公告)号:US10413727B2

    公开(公告)日:2019-09-17

    申请号:US15870430

    申请日:2018-01-12

    IPC分类号: A61N1/36 A61N1/05 H04R25/00

    摘要: Disclosed is a hearing auxiliary device for helping a person with hearing impairment to obtain hearing information. The hearing auxiliary device includes a bone conduct transceiver, a receiver and a driver. The bone conduct transceiver converts a sound raw data to a bone conduct signal. The receiver is installed to an inner ear portion of the person with hearing impairment, and the receiver receives the bone conduct signal and converts the bone conduct signal to a sound restoration signal. The driver sends out a physical signal according to the sound restoration signal, in order to let the person with hearing impairment to obtain a hearing signal.

    External electronic ear device and cochlear implant device

    公开(公告)号:US09656073B2

    公开(公告)日:2017-05-23

    申请号:US14996239

    申请日:2016-01-15

    摘要: An external electronic ear device includes a housing, an external magnet, a microphone, a processing circuit and a wireless signal transmitter circuit. The external magnet is disposed in the housing and attracts a receiver magnet disposed under a scalp of a user. The microphone is disposed in the housing and receives an external sound and generates a sound signal corresponding to the external sound. The processing circuit is disposed in the housing and converts the sound signal into an electrode driving signal. The wireless signal transmitter circuit is disposed in the housing and transmits the electrode driving signal to a cochlear implant device in the cochlear system. The cochlear implant device converts the electrode driving signal into a plurality of electrode currents, and a plurality of electrical pulses are generated in a cochlear nerve of the user through a plurality of electrodes according to the electrode currents.

    EXTERNAL ELECTRONIC EAR DEVICE AND COCHLEAR IMPLANT DEVICE
    4.
    发明申请
    EXTERNAL ELECTRONIC EAR DEVICE AND COCHLEAR IMPLANT DEVICE 有权
    外部电子耳设备和COCHLEAR IMPLANT DEVICE

    公开(公告)号:US20160206878A1

    公开(公告)日:2016-07-21

    申请号:US14996239

    申请日:2016-01-15

    摘要: An external electronic ear device includes a housing, an external magnet, a microphone, a processing circuit and a wireless signal transmitter circuit. The external magnet is disposed in the housing and attracts a receiver magnet disposed under a scalp of a user. The microphone is disposed in the housing and receives an external sound and generates a sound signal corresponding to the external sound. The processing circuit is disposed in the housing and converts the sound signal into an electrode driving signal. The wireless signal transmitter circuit is disposed in the housing and transmits the electrode driving signal to a cochlear implant device in the cochlear system. The cochlear implant device converts the electrode driving signal into a plurality of electrode currents, and a plurality of electrical pulses are generated in a cochlear nerve of the user through a plurality of electrodes according to the electrode currents.

    摘要翻译: 外部电子耳机包括壳体,外部磁体,麦克风,处理电路和无线信号发射器电路。 外部磁体设置在壳体中并吸引设置在使用者头皮下方的接收器磁体。 麦克风设置在外壳中并接收外部声音,并产生对应于外部声音的声音信号。 处理电路设置在壳体中并将声音信号转换成电极驱动信号。 无线信号发射器电路设置在外壳中,并将电极驱动信号传输到耳蜗系统中的人工耳蜗植入装置。 耳蜗植入装置将电极驱动信号转换为多个电极电流,并且根据电极电流通过多个电极在用户的耳蜗神经中产生多个电脉冲。

    System and method for optical proximity correction of a modified integrated circuit layout
    5.
    发明授权
    System and method for optical proximity correction of a modified integrated circuit layout 有权
    改进的集成电路布局的光学邻近校正系统和方法

    公开(公告)号:US08607171B2

    公开(公告)日:2013-12-10

    申请号:US13091316

    申请日:2011-04-21

    IPC分类号: G06F17/50

    CPC分类号: G03F1/36

    摘要: A system and method for modifying an integrated circuit (IC) layout includes performing a correction process, such as an optical proximity correction (OPC) process, only on regions within designated blocks that are defined around respective modified structures. An IC layout can be compared to a modified version of the IC layout to detect modified structures. One or more large blocks can then be defined around respective modified structures. A correction process can then be performed on only the one or more large blocks. Small blocks within respective large blocks can then be extracted from the modified IC layout and merged with the original IC layout to generate a final modified and corrected IC layout.

    摘要翻译: 用于修改集成电路(IC)布局的系统和方法包括仅在围绕各个修改的结构定义的指定块内的区域上执行诸如光学邻近校正(OPC)处理的校正处理。 可以将IC布局与IC布局的修改版本进行比较,以检测修改的结构。 然后可以围绕相应的修改结构定义一个或多个大块。 然后可以仅在一个或多个大块上执行校正处理。 然后可以从修改的IC布局中提取相应大块内的小块,并与原始IC布局合并,以产生最终修改和校正的IC布局。

    Methodology for wordline short reduction
    7.
    发明授权
    Methodology for wordline short reduction 有权
    字线缩短方法

    公开(公告)号:US08383515B2

    公开(公告)日:2013-02-26

    申请号:US12947309

    申请日:2010-11-16

    IPC分类号: H01L21/44

    CPC分类号: H01L27/11568 H01L21/76224

    摘要: The method of forming a wordline is provided in the present invention. The proposed method includes steps of: (a) providing a plurality of SASTIs with a plurality of first POLY cells deposited thereon; and (b) depositing a first fill-in material having a relatively high etching rate oxide-like material in the plurality of SASTIs and on each side wall of the plurality of first POLY cells.

    摘要翻译: 在本发明中提供了形成字线的方法。 所提出的方法包括以下步骤:(a)向多个SASTI提供沉积在其上的多个第一POLY单元; 和(b)在所述多个SASTI中和所述多个第一POLY电池的每个侧壁上沉积具有相对高蚀刻速率氧化物样材料的第一填充材料。

    Pad and method for chemical mechanical polishing
    9.
    发明授权
    Pad and method for chemical mechanical polishing 有权
    化学机械抛光垫和方法

    公开(公告)号:US08047899B2

    公开(公告)日:2011-11-01

    申请号:US11878654

    申请日:2007-07-26

    IPC分类号: B24B7/22 B24D3/34

    CPC分类号: B24B37/24 B24D3/346

    摘要: A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.

    摘要翻译: 提供了半导体器件的两个相邻结构的化学机械抛光方法。 一种用于机械抛光的方法,包括:(a)提供半导体器件,其包括在其表面形成的凹部,形成在所述表面上的第一层,以及填充有所述凹部并形成在所述第一层上的第二层; 和(b)用垫和基本上无抑制剂的浆料基本上抛光第一层和第二层,其中该垫包括第二层的腐蚀抑制剂。

    Etching method for semiconductor element
    10.
    发明授权
    Etching method for semiconductor element 有权
    半导体元件蚀刻方法

    公开(公告)号:US07951707B2

    公开(公告)日:2011-05-31

    申请号:US11723597

    申请日:2007-03-21

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/76802 H01L21/31144

    摘要: An etching method for semiconductor element is provided. The etching method includes the following procedure. First, a to-be-etched substrate is provided. Then, a silicon-rich silicon oxide (SRO) layer is formed on the to-be-etched substrate. Afterwards, an anti-reflective layer is formed on the SRO layer. Then, a patterned photo resist layer is formed on the anti-reflective layer. Afterwards, the anti-reflective layer, the SRO layer and the to-be-etched substrate is etched so as to form an opening.

    摘要翻译: 提供了半导体元件的蚀刻方法。 蚀刻方法包括以下步骤。 首先,提供被蚀刻的基板。 然后,在被蚀刻的基板上形成富硅氧化物(SRO)层。 之后,在SRO层上形成抗反射层。 然后,在抗反射层上形成图案化的光致抗蚀剂层。 之后,对抗反射层,SRO层和被蚀刻基板进行蚀刻以形成开口。