摘要:
A VENUS (Virtual Environment Network User Simulator) system, including: a VC (Virtual Client) agent for managing a plurality of VCs and providing a monitoring result; a server observer for transmitting a state of a server system by a request or periodically; a client observer for transmitting a state of a client system by a request or periodically; a testing game client for transmitting a state of an application program by using an API (Application Program Interface) provided from an observer library; a testing game server cluster for transmitting a state of an application program using the API provided from the observer library; and a CES (Central Engineering Station) for receiving an input from a user to setup a simulation environment, managing the VC agent, monitoring a network state and the state of the server system through the server observer, and monitoring the state of the client system through the client observer.
摘要:
A method, system and computer program product are disclosed for maintaining data coherence, for use in a multi-node processing system where each of the nodes includes one or more components. In one embodiment, the method comprises establishing a data domain, assigning a group of the components to the data domain, sending a coherence message from a first component of the processing system to a second component of the processing system, and determining if that second component is assigned to the data domain. In this embodiment, if that second component is assigned to the data domain, the coherence message is transferred to all of the components assigned to the data domain to maintain data coherency among those components. In an embodiment, if that second component is assigned to the data domain, the first component is assigned to the data domain.
摘要:
A system, method, and computer program product for enhancing timeliness of cache memory prefetching in a processing system are provided. The system includes a stride pattern detector to detect a stride pattern for a stride size in an amount of bytes as a difference between successive cache accesses. The system also includes a confidence counter. The system further includes eager prefetching control logic for performing a method when the stride size is less than a cache line size. The method includes adjusting the confidence counter in response to the stride pattern detector detecting the stride pattern, comparing the confidence counter to a confidence threshold, and requesting a cache prefetch in response to the confidence counter reaching the confidence threshold. The system may also include selection logic to select between the eager prefetching control logic and standard stride prefetching control logic.
摘要:
An antenna module, which minimizes a space, in an electronic apparatus set, occupied thereby without changing characteristics thereof, improves a degree of freedom of the installation structure thereof to increase the space utilization of the set, and achieves miniaturization and multi-functionality of electronic apparatuses, and an electronic apparatus having the antenna module. The antenna module includes a PCB (printed circuit board) made of nonconductive material having flexibility; an antenna element mounted at a designated position of the upper surface of the PCB; a ground line formed on the PCB so that the ground line is connected to a ground terminal of the antenna element, and provided with a joint portion formed at one end thereof; a feeder line formed on the PCB so that the feeder line is connected to a signal terminal of the antenna element, and provided with a joint portion formed at one end thereof; and a passive line, having a designated length, formed on the PCB in parallel with the feeder line. The joint portions of the ground line and the feeder line are bonded to designated positions of a set of the wireless electronic apparatus, and a portion of the antenna module having the antenna element mounted on the PCB is located outside the set.
摘要:
A system that enables a person to monitor and/or control a device via a network, such as the Internet, via an interactive hardware module that interfaces with the device and communicates with a module server located locally or remotely from the placement of the module. The hardware module allows for the transmission and receipt of data between the device interfaced to the hardware module and the module server, thereby enabling the user manually or automatically to control or monitor the device via an access medium, such as an API.
摘要:
A method, system and computer program product are disclosed for maintaining data coherence, for use in a multi-node processing system where each of the nodes includes one or more components. In one embodiment, the method comprises establishing a data domain, assigning a group of the components to the data domain, sending a coherence message from a first component of the processing system to a second component of the processing system, and determining if that second component is assigned to the data domain. In this embodiment, if that second component is assigned to the data domain, the coherence message is transferred to all of the components assigned to the data domain to maintain data coherency among those components. In an embodiment, if that second component is assigned to the data domain, the first component is assigned to the data domain.
摘要:
A system for predicting multiple targets for a single branch includes: a branch target buffer that includes a previous next address for an instruction and that receives an indirect instruction address to provide a first branch target prediction; a first branch table for capturing local past target information of an indirect branch in an encoded form; a second branch table which is a correlation table for storing potential branch targets based on a local branch history and which provides a second branch target prediction when the first branch target prediction is not successful; an exclusion predictor for inhibiting updates of inefficient entries; and a multiplexer to select the predicted target as output.
摘要:
The present invention relates to a sliding prevention device for a vehicle, which includes a plurality of spikes, each of which is formed with a supporting device having a triangular shaped contacting portion including a wide surface facing toward the outer peripheral edge of the dual wheels and both right and left legs contacting between the dual wheels so that it can be supported between the tires of the dual wheels, a braking plate engaged with the supporting device in the outer peripheral edge of the dual wheels to produce the breaking power by contacting with the dual wheels, and an engaging portion formed at an inward apex between the tires of the dual wheels; an interval maintaining device adapted to engage with engaging portion of the spike by inserting a wire and maintain the intervals between the plurality of spikes; and a locking portion including a ring shaped locking hook formed at one end of the wire in the interval maintaining device, an engaging lever having a length adjusting device and an elastic body formed at the other end of the wire, and a thrust prevention device formed to project at a position of the spike to be engaged, whereby the locking hook is adjusted in length by the length adjusting device and the elastic body to thereby engage with the engaging lever with the thrust of the spike being prevented by the thrust preventing device at the state of installing the plurality of spikes to the dual wheels after the spikes have been engaged with each other by the interval maintaining device.
摘要:
Provided are a multi-gate MOS transistor and a method of manufacturing the same. Two silicon fins are vertically stacked on a silicon on insulator (SOI) substrate, and four side surfaces of an upper silicon fin and three side surfaces of a lower silicon fin are used as a channel. Therefore, a channel width is increased, so that current driving capability of a device is improved, and high performance nano-level semiconductor IC and highly integrated memory IC can be manufactured through the optimization and stability of a process.
摘要:
A memory system includes a high-bandwidth memory device, the high-bandwidth memory device having a relatively high operation bandwidth, the high-bandwidth memory device having a plurality of access channels. A low-bandwidth memory device has a relatively low operation bandwidth relative to the high-bandwidth memory device, the low-bandwidth memory device having one or more access channels. An interleaving unit performs a memory interleave operation among the plurality of access channels of the high-bandwidth memory device and an access channel of the one or more access channels of the low-bandwidth memory device.