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    Non-volatile memory cell programming method
    4.
    发明授权
    Non-volatile memory cell programming method 有权
    非易失性存储单元编程方法

    公开(公告)号：US07907452B2

    公开(公告)日：2011-03-15

    申请号：US12081569

    申请日：2008-04-17

    申请人： Sang-jin Park ,  Kwang-soo Seol

    发明人： Sang-jin Park ,  Kwang-soo Seol

    IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/12

    CPC分类号： G11C16/10

    摘要： A non-volatile memory cell programming method of programming 2-bit data in a memory cell having 4 threshold voltage distributions may include a first program operation of programming a first bit of the 2-bit data in the memory cell by applying a first programming voltage to the memory cell; a second program operation of programming a second bit of the 2-bit data in the memory cell by applying a second programming voltage to the memory cell; and a stabilization operation of applying a stabilization voltage having an electric field opposite in polarity to an electric field formed by the first and second programming voltages to the memory cell after one of the first and second program operations that corresponds to a higher one of the first and second programming voltages is performed.

    摘要翻译： 在具有4个阈值电压分布的存储单元中编程2位数据的非易失性存储单元编程方法可以包括通过施加第一编程电压来对存储单元中的2位数据的第一位进行编程的第一编程操作 到记忆体; 第二编程操作，通过向存储单元施加第二编程电压来对存储器单元中的2位数据的第二位进行编程; 以及在第一和第二编程操作中的一个对应于第一和第二编程电压中较高的一个的第一和第二编程操作之一之后，将具有与第一和第二编程电压形成的电场的极性相反的电场的稳定电压施加到存储单元的稳定操作 并执行第二编程电压。

    Semiconductor memory device including recessed control gate electrode
    5.
    发明授权
    Semiconductor memory device including recessed control gate electrode 失效
    半导体存储器件包括凹入控制栅电极

    公开(公告)号：US07732855B2

    公开(公告)日：2010-06-08

    申请号：US11808982

    申请日：2007-06-14

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Yoon-dong Park ,  Sang-min Shin ,  In-jun Hwang ,  Sang-moo Choi ,  Ju-hee Park

    IPC分类号： H01L21/28

    CPC分类号： H01L29/42324 ,  G11C16/0408 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42336 ,  H01L29/4234 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792

    摘要： A semiconductor memory device may include a semiconductor substrate, at least one control gate electrode, at least one storage node layer, at least one tunneling insulating layer, at least one blocking insulating layer, and/or first and second channel regions. The at least one control gate electrode may be recessed into the semiconductor substrate. The at least one storage node layer may be between a sidewall of the at least one control gate electrode and the semiconductor substrate. The at least one tunneling insulating layer may be between the at least one storage node layer and the at least one control gate electrode. The at least one blocking insulating layer may be between the storage node layer and the control gate electrode. The first and second channel regions may be between the at least one tunneling insulating layer and the semiconductor substrate to surround at least a portion of the sidewall of the control gate electrode and/or may be separated from each other.

    摘要翻译： 半导体存储器件可以包括半导体衬底，至少一个控制栅电极，至少一个存储节点层，至少一个隧道绝缘层，至少一个阻挡绝缘层和/或第一和第二沟道区。 至少一个控制栅电极可以凹进到半导体衬底中。 所述至少一个存储节点层可以在所述至少一个控制栅电极的侧壁和所述半导体衬底之间。 所述至少一个隧道绝缘层可以在所述至少一个存储节点层和所述至少一个控制栅电极之间。 所述至少一个阻挡绝缘层可以在所述存储节点层和所述控制栅电极之间。 第一和第二沟道区可以在至少一个隧道绝缘层和半导体衬底之间，以围绕控制栅电极的侧壁的至少一部分和/或可以彼此分离。

    Al-doped charge trap layer and non-volatile memory device including the same
    6.
    发明授权
    Al-doped charge trap layer and non-volatile memory device including the same 有权
    Al掺杂电荷陷阱层和包括其的非易失性存储器件

    公开(公告)号：US08053366B2

    公开(公告)日：2011-11-08

    申请号：US12923378

    申请日：2010-09-17

    申请人： Eun-ha Lee ,  Hlon-suck Baik ,  Kwang-soo Seol ,  Sang-jin Park ,  Jong-bong Park ,  Min-ho Yang

    发明人： Eun-ha Lee ,  Hlon-suck Baik ,  Kwang-soo Seol ,  Sang-jin Park ,  Jong-bong Park ,  Min-ho Yang

    IPC分类号： H01L21/336 ,  H01L21/44

    CPC分类号： H01L29/42332 ,  Y10T428/259

    摘要： Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

    摘要翻译： 提供了铝（Al）掺杂的电荷阱层，非易失性存储器件及其制造方法。 电荷陷阱层可以包括捕获电荷的多个硅纳米点和覆盖硅纳米点的氧化硅层，其中电荷陷阱层掺杂有铝（Al）。 非挥发性存储器件可以包括衬底，该衬底包括在衬底的分离区域上的源极和漏极，在衬底上接触源极和漏极的隧道膜，根据示例性实施例的电荷陷阱层， 电荷陷阱层和阻挡膜上的栅电极。

    Al-doped charge trap layer, non-volatile memory device and methods of fabricating the same
    8.
    发明申请
    Al-doped charge trap layer, non-volatile memory device and methods of fabricating the same 有权
    Al掺杂电荷陷阱层，非易失性存储器件及其制造方法

    公开(公告)号：US20110006358A1

    公开(公告)日：2011-01-13

    申请号：US12923378

    申请日：2010-09-17

    申请人： Eun-ha Lee ,  Hlon-suck Baik ,  Kwang-soo Seol ,  Sang-jin Park ,  Jong-bong Park ,  Min-ho Yang

    发明人： Eun-ha Lee ,  Hlon-suck Baik ,  Kwang-soo Seol ,  Sang-jin Park ,  Jong-bong Park ,  Min-ho Yang

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42332 ,  Y10T428/259

    摘要： Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

    摘要翻译： 提供了铝（Al）掺杂的电荷阱层，非易失性存储器件及其制造方法。 电荷陷阱层可以包括捕获电荷的多个硅纳米点和覆盖硅纳米点的氧化硅层，其中电荷陷阱层掺杂有铝（Al）。 非挥发性存储器件可以包括衬底，该衬底包括在衬底的分离区域上的源极和漏极，在衬底上接触源极和漏极的隧道膜，根据示例性实施例的电荷陷阱层， 电荷陷阱层和阻挡膜上的栅电极。

    Method of programming non-volatile memory device
    9.
    发明授权
    Method of programming non-volatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US07751254B2

    公开(公告)日：2010-07-06

    申请号：US12213425

    申请日：2008-06-19

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Jung-hun Sung

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Jung-hun Sung

    IPC分类号： G11C11/34

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3454

    摘要： A method of programming a non-volatile memory device may include performing a first programming operation including applying a program voltage to a memory cell and verifying the memory cell using a first verification voltage. A perturbation pulse may be applied to the memory cell to facilitate thermalization of charges in the memory cell if the memory cell passes the verification using the first verification voltage. The memory cell may be verified using a second verification voltage greater than the first verification voltage after the perturbation pulse is applied.

    摘要翻译： 编程非易失性存储器件的方法可以包括执行第一编程操作，包括将程序电压施加到存储器单元并且使用第一验证电压来验证存储器单元。 如果存储器单元通过使用第一验证电压的验证，则可以将扰动脉冲施加到存储器单元以便于存储器单元中的电荷的热化。 可以在施加扰动脉冲之后使用大于第一验证电压的第二验证电压来验证存储器单元。

    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers
    10.
    发明授权
    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers 失效
    非易失性存储器件及其编程方法，包括通过电荷陷阱层之间的衬垫氧化物层移动电子

    公开(公告)号：US07668016B2

    公开(公告)日：2010-02-23

    申请号：US12078141

    申请日：2008-03-27

    申请人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    发明人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0475 ,  G11C16/10 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/7923

    摘要： Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

    摘要翻译： 提供非易失性存储器件以及通过衬垫氧化物层对电子在电荷陷阱层之间移动的非易失性存储器件进行编程的方法。 非易失性存储器件包括半导体衬底上的电荷陷阱层，并且存储电子，在第一电荷陷阱层上形成焊盘氧化物层，并且在焊盘氧化物层上存储第二陷阱层并存储电子。 在写入数据的编程模式中，所存储的电子在第一电荷陷阱层的第一位置和第二电荷陷阱层的第一位置之间通过焊盘氧化物层或第一电荷陷阱的第二位置之间移动 层和第二电荷陷阱层的第二位置穿过衬垫氧化物层。