Method for forming a lower electrode by using an electroplating method
    1.
    发明授权
    Method for forming a lower electrode by using an electroplating method 失效
    通过电镀法形成下电极的方法

    公开(公告)号:US06451666B2

    公开(公告)日:2002-09-17

    申请号:US09735528

    申请日:2000-12-14

    IPC分类号: H01L218242

    摘要: A method for manufacturing a semiconductor device can form a thick lower electrode made of Pt. The method begins with the preparation of an active matrix provided with at least one transistor, a plurality of conductive plugs electrically connected to the transistors and an insulating layer formed around the conductive plugs. Thereafter, a seed layer is formed on top of the active matrix and a dummy oxide layer is formed on top of the seed layer. Then, the dummy oxide layer is patterned into a predetermined configuration, thereby exposing portions of the seed layer which are located on top of the conductive plugs. The exposed portions are filled with a conductive material to a predetermined thickness. The dummy oxide layer and portions of the seed layer which are not covered with the conductive material are removed, thereby obtaining lower electrodes. A capacitor dielectric layer is on the lower electrodes. Finally, an upper electrode layer is formed on the capacitor dielectric layer.

    摘要翻译: 制造半导体器件的方法可以形成由Pt制成的厚的下部电极。 该方法开始于制备具有至少一个晶体管的有源矩阵,电连接到晶体管的多个导电插塞和形成在导电插塞周围的绝缘层。 此后,在有源矩阵的顶部上形成种子层,并且在种子层的顶部上形成虚拟氧化物层。 然后,将虚拟氧化物层图案化为预定构造,从而暴露位于导电插塞顶部的种子层的部分。 暴露部分用导电材料填充到预定厚度。 去除未被导电材料覆盖的虚拟氧化物层和种子层的部分,从而获得下部电极。 电容器电介质层位于下电极上。 最后,在电容器电介质层上形成上电极层。

    Semiconductor memory device having a plug contacted to a capacitor electrode and method for fabricating the capacitor
    2.
    发明授权
    Semiconductor memory device having a plug contacted to a capacitor electrode and method for fabricating the capacitor 失效
    具有与电容器电极接触的插头的半导体存储器件及其制造方法

    公开(公告)号:US06734061B2

    公开(公告)日:2004-05-11

    申请号:US09888060

    申请日:2001-06-25

    IPC分类号: H01L218242

    CPC分类号: H01L28/60

    摘要: The present invention provides a semiconductor memory device and a fabrication method capable of preventing the contact between a dielectric layer of a capacitor and a diffusion barrier. The plug comprises a diffusion barrier layer and a seed layer for forming a lower electrode of a capacitor. Accordingly, it is possible to prevent the dielectric layer being contacted with the diffusion barrier, whereby the leakage current may be reduced, and the capacitance of the capacitor may be increased.

    摘要翻译: 本发明提供一种能够防止电容器的电介质层和扩散阻挡层之间的接触的半导体存储器件和制造方法。 插塞包括用于形成电容器的下电极的扩散阻挡层和籽晶层。 因此,可以防止介电层与扩散阻挡层接触,从而可以减小漏电流,并且可以增加电容器的电容。

    Method for fabricating a capacitor in a semiconductor device
    3.
    发明授权
    Method for fabricating a capacitor in a semiconductor device 失效
    在半导体器件中制造电容器的方法

    公开(公告)号:US06383865B2

    公开(公告)日:2002-05-07

    申请号:US09886389

    申请日:2001-06-22

    IPC分类号: H01L218242

    摘要: A method for fabricating a capacitor of a semiconductor device, comprising the steps of forming a seed layer over a semiconductor substrate, and forming multiple oxide layers on the seed layer, wherein wet etching of the multiple oxide layers decreases as the layers go up. A first opening is formed by exposing the seed layer by selectively dry etching the multiple oxide layer. A second opening is formed by wet etching the lateral surface of the first opening where the width of the first opening is expanded, wherein the lower part of the second opening is larger than the upper part. A bottom electrode is formed on the seed layer exposed at the bottom of the second opening, whereby the bottom electrode has an identical shape with the second opening, and the bottom electrode is formed with the ECD (Electro-Chemical Deposition) technique. The seed layer is exposed by removing the multiple oxide layer and then the exposed seed layer is removed. A dielectric layer is formed on the bottom electrode and a top electrode is formed on the dielectric layer.

    摘要翻译: 一种制造半导体器件的电容器的方法,包括以下步骤:在半导体衬底上形成种子层,并在种子层上形成多个氧化物层,其中多层氧化物层的湿法蚀刻随着层的上升而减小。 通过选择性地干蚀刻多层氧化物层来暴露晶种层而形成第一开口。 通过湿式蚀刻第一开口的宽度扩大的第一开口的侧表面,其中第二开口的下部比上部大,形成第二开口。 在暴露在第二开口底部的种子层上形成底部电极,由此底部电极与第二个开口具有相同的形状,底部电极由ECD(电化学沉积)技术形成。 通过去除多个氧化物层来暴露种子层,然后去除暴露的种子层。 在底部电极上形成电介质层,并且在电介质层上形成顶部电极。

    Semiconductor device and method for fabricating the same
    4.
    发明授权
    Semiconductor device and method for fabricating the same 失效
    半导体装置及其制造方法

    公开(公告)号:US07820507B2

    公开(公告)日:2010-10-26

    申请号:US11296098

    申请日:2005-12-06

    申请人: Hyung-Bok Choi

    发明人: Hyung-Bok Choi

    IPC分类号: H01L21/8242

    CPC分类号: H01L28/91 H01L21/7687

    摘要: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: an inter-layer dielectric (ILD) layer formed on a semiconductor substrate; a contact plug formed in the ILD layer, such that a predetermined portion of the contact plug protrudes above the ILD layer; an etch stop layer formed on the ILD layer exposing a top portion of the contact plug; and a bottom electrode of a capacitor formed partially in the etch stop layer to be isolated from the ILD layer by the etch stop layer and the contact plug to prevent a direct contact with the ILD layer, and to be partially contacted with the contact plug.

    摘要翻译: 提供了一种半导体器件及其制造方法。 半导体器件包括:形成在半导体衬底上的层间电介质(ILD)层; 形成在ILD层中的接触塞,使得接触塞的预定部分突出于ILD层上方; 形成在所述ILD层上的暴露所述接触插塞的顶部的蚀刻停止层; 以及部分地在所述蚀刻停止层中形成的电容器的底部电极,以通过所述蚀刻停止层和所述接触插塞与所述ILD层隔离以防止与所述ILD层直接接触,并且与所述接触插塞部分地接触。

    Semiconductor device and method for fabricating the same
    5.
    发明申请
    Semiconductor device and method for fabricating the same 失效
    半导体装置及其制造方法

    公开(公告)号:US20070045703A1

    公开(公告)日:2007-03-01

    申请号:US11296098

    申请日:2005-12-06

    申请人: Hyung-Bok Choi

    发明人: Hyung-Bok Choi

    IPC分类号: H01L27/108

    CPC分类号: H01L28/91 H01L21/7687

    摘要: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: an inter-layer dielectric (ILD) layer formed on a semiconductor substrate; a contact plug formed in the ILD layer, such that a predetermined portion of the contact plug protrudes above the ILD layer; an etch stop layer formed on the ILD layer exposing a top portion of the contact plug; and a bottom electrode of a capacitor formed partially in the etch stop layer to be isolated from the ILD layer by the etch stop layer and the contact plug to prevent a direct contact with the ILD layer, and to be partially contacted with the contact plug.

    摘要翻译: 提供了一种半导体器件及其制造方法。 半导体器件包括:形成在半导体衬底上的层间电介质(ILD)层; 形成在ILD层中的接触塞,使得接触塞的预定部分突出于ILD层上方; 形成在所述ILD层上的暴露所述接触插塞的顶部的蚀刻停止层; 以及部分地在所述蚀刻停止层中形成的电容器的底部电极,以通过所述蚀刻停止层和所述接触插塞与所述ILD层隔离以防止与所述ILD层直接接触,并且与所述接触插塞部分地接触。

    Semiconductor device and method for fabricating the same
    6.
    发明授权
    Semiconductor device and method for fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号:US07115468B2

    公开(公告)日:2006-10-03

    申请号:US11140843

    申请日:2005-05-31

    申请人: Hyung-Bok Choi

    发明人: Hyung-Bok Choi

    IPC分类号: H01L21/8242

    摘要: A semiconductor device and a fabricating method for the same are disclosed, in which when forming a capacitor sacrificial film pattern, even if a misalignment occurs, the degradation of the dielectric property due to a direct contact between the contact plug and the dielectric medium can be prevented. The semiconductor device includes a connecting part connected through an insulating layer of a substrate to a conductive layer, a seed separating layer formed around the connecting part and the insulating layer to provide an open region exposing at least part of the connecting part, a seed layer filled into the open region of the seed separating layer and a capacitor. The capacitor includes of a lower electrode formed upon the seed layer, a dielectric medium formed upon the lower electrode, and an upper electrode formed upon the dielectric medium.

    摘要翻译: 公开了一种半导体器件及其制造方法,其中当形成电容器牺牲膜图案时,即使发生不对准,由于接触插塞和电介质之间的直接接触导致的介电性质的劣化可以是 防止了 半导体器件包括通过衬底的绝缘层连接到导电层的连接部分,围绕连接部分形成的晶种分离层和绝缘层,以提供暴露连接部分的至少一部分的开放区域,种子层 填充到种子分离层的开放区域和电容器中。 电容器包括形成在种子层上的下电极,形成在下电极上的电介质和形成在电介质上的上电极。

    Method for fabricating capacitor using electrochemical deposition
    7.
    发明授权
    Method for fabricating capacitor using electrochemical deposition 失效
    使用电化学沉积制造电容器的方法

    公开(公告)号:US06818497B2

    公开(公告)日:2004-11-16

    申请号:US10330125

    申请日:2002-12-30

    IPC分类号: H01L218242

    摘要: The present invention relates to a method for fabricating a capacitor of a semiconductor memory device using an electrochemical deposition. The method in accordance with the present invention includes the steps of forming a contact hole in an insulating layer formed on a substrate; forming a plug in the contact hole, wherein the plug contains a nitride layer; forming a seed layer on the insulating layer and in the contact hole; forming a sacrificial layer including a trench overlapped with the contact hole; forming a Ru bottom electrode in the trench with electrochemical deposition; removing the sacrificial layer and exposing the Ru bottom electrode, wherein the seed layer not covered with the Ru bottom electrode is exposed; removing the exposed seed layer; forming a dielectric layer on the Ru bottom electrode; and forming a top electrode on the dielectric layer.

    摘要翻译: 本发明涉及使用电化学沉积制造半导体存储器件的电容器的方法。 根据本发明的方法包括在形成在基板上的绝缘层中形成接触孔的步骤; 在所述接触孔中形成插塞,其中所述插塞包含氮化物层; 在绝缘层和接触孔中形成晶种层; 形成包括与所述接触孔重叠的沟槽的牺牲层; 在电化学沉积中在沟槽中形成Ru底电极; 去除牺牲层并暴露Ru底部电极,其中未被Ru底部电极覆盖的种子层被暴露; 去除暴露的种子层; 在Ru底部电极上形成电介质层; 并在电介质层上形成顶部电极。

    Method for fabricating capacitor in semiconductor device
    8.
    发明授权
    Method for fabricating capacitor in semiconductor device 失效
    在半导体器件中制造电容器的方法

    公开(公告)号:US07547598B2

    公开(公告)日:2009-06-16

    申请号:US11519018

    申请日:2006-09-12

    申请人: Hyung-Bok Choi

    发明人: Hyung-Bok Choi

    IPC分类号: H01L21/8242

    摘要: A method for fabricating a capacitor in a semiconductor device includes forming a first insulation layer over a substrate, forming storage node contact plugs in the first insulation layer, contacting predetermined portions of the substrate, forming a second insulation layer over the first insulation layer and the storage node contact plugs, forming trenches exposing the storage node contact plugs, forming storage nodes in the trenches, forming a plasma barrier layer over the second insulation layer and the storage nodes, forming a capping layer over the plasma barrier layer and filled in the trenches, removing the capping layer, the plasma barrier layer, and the second insulation layer, forming a dielectric layer over the storage nodes, and forming a plate electrode over the dielectric layer.

    摘要翻译: 一种在半导体器件中制造电容器的方法包括在衬底上形成第一绝缘层,在第一绝缘层中形成存储节点接触插塞,接触衬底的预定部分,在第一绝缘层上形成第二绝缘层, 存储节点接触插塞,形成暴露存储节点接触插塞的沟槽,在沟槽中形成存储节点,在第二绝缘层和存储节点上形成等离子体阻挡层,在等离子体阻挡层上形成覆盖层并填充在沟槽中 去除覆盖层,等离子体阻挡层和第二绝缘层,在存储节点上形成电介质层,并在电介质层上形成平板电极。

    Method for fabricating capacitor using electrochemical deposition and wet etching
    10.
    发明授权
    Method for fabricating capacitor using electrochemical deposition and wet etching 失效
    使用电化学沉积和湿蚀刻制造电容器的方法

    公开(公告)号:US06699769B2

    公开(公告)日:2004-03-02

    申请号:US10330353

    申请日:2002-12-30

    IPC分类号: H01L2120

    摘要: Provided is a method for fabricating a capacitor using an electrochemical deposition method and Ce(NH4)2(NO3)6 solution. The method includes the steps of: a) forming a contact hole in an insulation layer on a substrate; b) forming a plug including nitride in the contact hole; c) forming a Ru seed layer in the contact hole and on the insulation layer; d) forming a sacrificial layer including an open area overlapped with the contact hole on the Ru seed layer; e) forming a Ru layer for an electrode of the capacitor in the open area by performing electrochemical deposition; f) removing the sacrificial layer, whereby the Ru seed layer not covered with the Ru layer is exposed; and g) etching the exposed Ru seed layer by using an aqueous solution including Ce(NH4)2(NO3)6.

    摘要翻译: 提供了使用电化学沉积法和Ce(NH 4)2(NO 3)6溶液制造电容器的方法。 该方法包括以下步骤:a)在基板上的绝缘层中形成接触孔; b)在接触孔中形成包括氮化物的塞子; c)在接触孔和绝缘层上形成Ru籽晶层; d)形成包括与Ru籽晶层上的接触孔重叠的开口区域的牺牲层; e)通过进行电化学沉积在开放区域形成用于电容器电极的Ru层; f)去除牺牲层,由此暴露不被Ru层覆盖的Ru籽晶层; 并且g)通过使用包含Ce(NH 4)2(NO 3)6的水溶液来蚀刻暴露的Ru种子层。