公开(公告)号：US06428387B1

公开(公告)日：2002-08-06

申请号：US09615378

申请日：2000-07-13

Applicant: Kyle P. Hunt ,  William R. Morrison

Inventor： Kyle P. Hunt ,  William R. Morrison

IPC: B24B100

CPC classification number: B24B37/04 ,  B24B57/02 ,  H01L21/31053

Abstract: A chemical mechanical polishing method using a modified slurry. A modified slurry is used with high platen rotational speed and high wafer carrier rotation speeds. The endpoint of the polishing process is determined by monitoring the electrical current of the wafer carrier motor.

Abstract translation: 使用改性浆料的化学机械抛光方法。 使用改进的浆料，具有高的台板转速和高的晶片载体转速。 通过监测晶片载体电动机的电流来确定抛光过程的终点。

公开(公告)号：US5938505A

公开(公告)日：1999-08-17

申请号：US34514

申请日：1998-03-04

Applicant: William R. Morrison ,  Kyle P. Hunt

Inventor： William R. Morrison ,  Kyle P. Hunt

IPC: C09G1/02 ,  C09K3/14 ,  B24B1/04

CPC classification number: C09G1/02 ,  C09K3/1463

Abstract: An improved slurry for polish removal. One application of this slurry is for shallow trench isolation processing in semiconductor manufacturing. The improved slurry has an enhanced oxide to nitride polish removal selectivity. A modified slurry is formed by mixing a polishing slurry with tetramethyl ammonium hydroxide and hydrogen peroxide. In an alternative embodiment, the modified slurry is formed by mixing a salt of tetramethyl ammonium with a base and with hydrogen peroxide to form the modified slurry. The improved slurry when used during the chemical mechanical polishing (CMP) step of an integrated shallow trench isolation manufacturing process allows the reverse pattern, etch and clean steps to be eliminated prior to CMP.

Abstract translation: 改进的抛光浆料。 这种浆料的一个应用是用于半导体制造中的浅沟槽隔离处理。 改进的浆料具有增强的氧化物至氮化物抛光选择性。 通过将抛光浆料与四甲基氢氧化铵和过氧化氢混合而形成改性浆料。 在替代实施方案中，改性浆料是通过将四甲基铵盐与碱和过氧化氢混合以形成改性浆料形成的。 当在集成浅沟槽隔离制造工艺的化学机械抛光（CMP）步骤期间使用时，改进的浆料允许在CMP之前消除反向图案，蚀刻和清洁步骤。

公开(公告)号：US06461965B1

公开(公告)日：2002-10-08

申请号：US10061811

申请日：2002-01-31

Applicant: Kyle P. Hunt ,  William R. Morrison

Inventor： Kyle P. Hunt ,  William R. Morrison

IPC: H01L21461

CPC classification number: B24B49/16 ,  B24B37/042

Abstract: A method for effecting a finishing operation on a semiconductor workpiece situated in a finishing apparatus that includes a finishing tool configured for pressingly engaging the workpiece with a pressing force for abradingly removing material from the workpiece includes the steps of: (a) situating the finishing tool to operate against the workpiece; (b) operating the finishing tool with a pressing force to effect the abrading removal; (c) measuring at least one parameter associated with the finishing operation to determine at least one parametric value for the at least one parameter; (d) modulating the pressing force according to a predetermined relationship between the pressing force and the at least one parametric value; and (e) repeating steps (c) and (d) until the finishing operation is complete.

Abstract translation: 一种用于对位于精加工设备中的半导体工件进行精加工操作的方法，该方法包括：精加工工具，其被构造成用于用工件压紧地接合用于从工件中去除材料的压力的加压力，包括以下步骤：（a）将精加工工具 对工件进行操作; （b）用压力操作精加工工具进行研磨去除; （c）测量与所述整理操作相关联的至少一个参数以确定所述至少一个参数的至少一个参数值; （d）根据所述按压力与所述至少一个参数值之间的预定关系来调节所述按压力; 和（e）重复步骤（c）和（d），直到完成操作完成。

公开(公告)号：US6116338A

公开(公告)日：2000-09-12

申请号：US150229

申请日：1998-09-09

Applicant: William R. Morrison ,  Carl G. Woodworth ,  Robert P. Allen

Inventor： William R. Morrison ,  Carl G. Woodworth ,  Robert P. Allen

IPC: B01D19/00 ,  E21B43/38 ,  F04D9/00 ,  F04D29/22

CPC classification number: F04D9/001 ,  B01D19/0052 ,  E21B43/38 ,  F04D29/2277

Abstract: An device for use down-hole in an oil well for inducing heavy crude oil to flow into the inlet of a centrifugal pump by creating a positive pressure on the bottom inlet of the pump. The device inserts into the down-hole equipment string between the gas separator and the centrifugal pump. The device consists of an auger that attaches to and rotates with the shaft of an electric down-hole motor and a housing that surrounds the auger. The housing connects to the gas separator at the bottom end of the device and connects to the centrifugal pump at a top end of the device. The auger has tight clearance with the housing to enable the rotating auger to force the fluid upward within the housing as the auger rotates. The vanes of the auger are arranged so that the fluid is pushed with increasing pressure as it moves upward through the device to the centrifugal pump.

Abstract translation: 一种用于在油井中使用井底的装置，用于通过在泵的底部入口上产生正压来引起重质原油流入离心泵的入口。 该装置插入气体分离器和离心泵之间的井下设备串中。 该装置包括一个螺旋推运器，该螺旋钻与电动井下电动机的轴连接并与其旋转，以及围绕螺旋钻的壳体。 外壳连接到设备底端的气体分离器，并连接到设备顶端的离心泵。 螺旋钻与壳体具有紧密的间隙，以使旋转的螺旋推运器在螺旋钻旋转时将流体向上压入壳体内。 螺旋推运器的叶片布置成使得当流体通过装置向上移动到离心泵时，流体被增加的压力推动。

公开(公告)号：US07452818B2

公开(公告)日：2008-11-18

申请号：US11694700

申请日：2007-03-30

Applicant: Kyle Hunt ,  Neel Bhatt ,  Asadd M. Hosein ,  Brian L. Vialpando ,  William R. Morrison

Inventor： Kyle Hunt ,  Neel Bhatt ,  Asadd M. Hosein ,  Brian L. Vialpando ,  William R. Morrison

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/31053 ,  H01L21/31055 ,  H01L21/76229

Abstract: The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) over a substrate (310), and then forming a layer of material (510) over the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445). This method further includes selectively etching portions of the layer of material (510) based upon a density or size of the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) located thereunder, and then polishing remaining portions of the layer of material (510).

Abstract translation: 本发明提供一种制造半导体器件的方法。 在一个实施例中，该方法包括在衬底（310）上形成半导体特征（405,410,415,420,425,430,435,440,445），然后在半导体上形成材料层（510） 特征（405,410,415,420,425,430,435,440,445）。 该方法还包括基于位于其下方的半导体特征（405,410,415,420,425,430,435,440,445）的密度或尺寸来选择性地蚀刻材料层（510）的部分，然后抛光 材料层的剩余部分（510）。

公开(公告)号：US20090243011A1

公开(公告)日：2009-10-01

申请号：US12055419

申请日：2008-03-26

Applicant: Earl V. Atnip ,  William R. Morrison

Inventor： Earl V. Atnip ,  William R. Morrison

IPC: H01L31/0232 ,  G02B26/08

CPC classification number: G02B26/0841

Abstract: In accordance with the teachings of one embodiment of the present disclosure, a method for manufacturing a semiconductor device includes forming a support structure outwardly from a substrate. The support structure has a first thickness and a first outer sidewall surface that is not parallel with the substrate. The first outer sidewall surface has a first minimum refractive index. A first anti-reflective layer is formed outwardly from the support structure and outwardly from the substrate. A second anti-reflective layer is formed outwardly from the first anti-reflective layer. The first and second anti-reflective layers each includes respective compounds of at least two elements selected from the group consisting of: silicon; nitrogen; and oxygen.

Abstract translation: 根据本公开的一个实施例的教导，半导体器件的制造方法包括从衬底向外形成支撑结构。 支撑结构具有第一厚度和不与基板平行的第一外侧壁表面。 第一外侧壁表面具有第一最小折射率。 第一抗反射层从支撑结构向外形成并且从衬底向外形成。 第二抗反射层从第一抗反射层向外形成。 第一和第二抗反射层各自包含选自以下的至少两种元素的各自的化合物：硅; 氮; 和氧气。

公开(公告)号：US20080242007A1

公开(公告)日：2008-10-02

申请号：US11694700

申请日：2007-03-30

Applicant: Kyle Hunt ,  Neel Bhatt ,  Asadd M. Hosein ,  Brian L. Vialpando ,  William R. Morrison

Inventor： Kyle Hunt ,  Neel Bhatt ,  Asadd M. Hosein ,  Brian L. Vialpando ,  William R. Morrison

IPC: H01L21/28

CPC classification number: H01L21/31053 ,  H01L21/31055 ,  H01L21/76229

Abstract: The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) over a substrate (310), and then forming a layer of material (510) over the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445). This method further includes selectively etching portions of the layer of material (510) based upon a density or size of the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) located thereunder, and then polishing remaining portions of the layer of material (510).

Abstract translation: 本发明提供一种制造半导体器件的方法。 在一个实施例中，该方法包括在衬底（310）上形成半导体特征（405,410,415,420,425,430,435,440,445），然后在半导体上形成材料层（510） 特征（405,410,415,420,425,430,435,440,445）。 该方法还包括基于位于其下方的半导体特征（405,410,415,420,425,430,435,440,445）的密度或尺寸来选择性地蚀刻材料层（510）的部分，然后抛光 材料层的剩余部分（510）。

公开(公告)号：US07960840B2

公开(公告)日：2011-06-14

申请号：US12463830

申请日：2009-05-11

Applicant: Thomas Dyer Bonifield ,  Thomas W. Winter ,  William R. Morrison ,  Gregory D. Winterton ,  Asad M. Haider

Inventor： Thomas Dyer Bonifield ,  Thomas W. Winter ,  William R. Morrison ,  Gregory D. Winterton ,  Asad M. Haider

IPC: H01L23/52

CPC classification number: B81C1/0023 ,  B81B2207/096 ,  B81C2201/0191 ,  H01L21/6835 ,  H01L21/76898 ,  H01L2924/14

Abstract: A TSV-MEMS packaging process is provided. The process includes forming TSVs in the front side of the product wafer, and attaching a first carrier to the front side of the product wafer, subsequent to forming TSVs. The process further includes thinning the back side of the product wafer to expose TSV tips, detaching the first carrier from the front side of the product wafer, and transferring the thinned wafer to a second carrier with back side adhered to the second wafer carrier. Semiconductor components are added to the front side of the product wafer, followed by forming a hermetic cavity over the added semiconductor components, and detaching the second carrier from the back side of the product wafer. Wafer level processing continues after detaching the second carrier.

Abstract translation: 提供TSV-MEMS封装工艺。 该方法包括在形成TSV之后，在产品晶片的前侧形成TSV，并将第一载体附接到产品晶片的前侧。 该方法还包括使产品晶片的背面变薄以暴露TSV尖端，将第一载体从产品晶片的前侧分离出来，以及将薄化的晶片转移到第二载体，其背面粘附到第二晶片载体上。 将半导体部件添加到产品晶片的前侧，随后在所加入的半导体部件上形成密封腔，并从产品晶片的背面分离第二载体。 拆卸第二个承运人后，晶圆级处理继续。

公开(公告)号：US08736936B2

公开(公告)日：2014-05-27

申请号：US13437670

申请日：2012-04-02

Applicant: Earl V. Atnip ,  William R. Morrison

Inventor： Earl V. Atnip ,  William R. Morrison

IPC: G02B26/08

CPC classification number: G02B26/0841

Abstract: In accordance with the teachings of one embodiment of this disclosure, a method for manufacturing a semiconductor device includes forming a support structure outwardly from a substrate. The support structure has a first thickness and a first outer sidewall surface that is not parallel with the substrate. The first outer sidewall surface has a first minimum refractive index. A first anti-reflective layer is formed outwardly from the support structure and outwardly from the substrate. A second anti-reflective layer is formed outwardly from the first anti-reflective layer. The first and second anti-reflective layers each includes respective compounds of at least two elements selected from the group consisting of: silicon; nitrogen; and oxygen.

Abstract translation: 根据本公开的一个实施例的教导，半导体器件的制造方法包括从衬底向外形成支撑结构。 支撑结构具有第一厚度和不与基板平行的第一外侧壁表面。 第一外侧壁表面具有第一最小折射率。 第一抗反射层从支撑结构向外形成并且从衬底向外形成。 第二抗反射层从第一抗反射层向外形成。 第一和第二抗反射层各自包含选自以下的至少两种元素的各自的化合物：硅; 氮; 和氧气。

公开(公告)号：US20120307342A1

公开(公告)日：2012-12-06

申请号：US13437670

申请日：2012-04-02

Applicant: Earl V. Atnip ,  William R. Morrison

Inventor： Earl V. Atnip ,  William R. Morrison

IPC: B05D5/06 ,  G02B26/00

CPC classification number: G02B26/0841

Abstract: In accordance with the teachings of one embodiment of this disclosure, a method for manufacturing a semiconductor device includes forming a support structure outwardly from a substrate. The support structure has a first thickness and a first outer sidewall surface that is not parallel with the substrate. The first outer sidewall surface has a first minimum refractive index. A first anti-reflective layer is formed outwardly from the support structure and outwardly from the substrate. A second anti-reflective layer is formed outwardly from the first anti-reflective layer. The first and second anti-reflective layers each includes respective compounds of at least two elements selected from the group consisting of: silicon; nitrogen; and oxygen.

Abstract translation: 根据本公开的一个实施例的教导，半导体器件的制造方法包括从衬底向外形成支撑结构。 支撑结构具有第一厚度和不与基板平行的第一外侧壁表面。 第一外侧壁表面具有第一最小折射率。 第一抗反射层从支撑结构向外形成并且从衬底向外形成。 第二抗反射层从第一抗反射层向外形成。 第一和第二抗反射层各自包含选自以下的至少两种元素的各自的化合物：硅; 氮; 和氧气。