公开(公告)号：US20240313127A1

公开(公告)日：2024-09-19

申请号：US18672820

申请日：2024-05-23

Applicant: LG Display Co., Ltd.

Inventor： JeongSuk YANG ,  KwangMin JO ,  Sohyung LEE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H10K59/121 ,  H10K59/124

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/6675 ,  H01L29/78609 ,  H01L29/78621 ,  H01L29/7869 ,  H10K59/1213 ,  H10K59/124

Abstract: A display apparatus can include a first thin film transistor including a first active layer including polycrystalline silicon, a first gate electrode overlapping the first active layer with a first gate insulation layer therebetween, and a first source electrode and a first drain electrode connected to the first active layer, a first interlayer insulation layer disposed on the first gate electrode, a second thin film transistor including a second active layer including an oxide semiconductor, a second gate electrode overlapping the second active layer with a second gate insulation layer therebetween, and a second source electrode and a second drain electrode connected to the second active layer, and a second interlayer insulation layer disposed on the first gate electrode, the second gate electrode, and the second gate insulation layer. Also, the second gate insulation layer and the second interlayer insulation layer comprise a dopant for doping the second active layer.

公开(公告)号：US20210143279A1

公开(公告)日：2021-05-13

申请号：US17154852

申请日：2021-01-21

Applicant: LG Display Co., Ltd.

Inventor： SeungJin KIM ,  HeeSung LEE ,  Sohyung LEE ,  MinCheol KIM ,  JeongSuk YANG ,  JeeHo PARK ,  Seoyeon IM

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  G09G3/3266 ,  H01L29/66 ,  H01L29/417

Abstract: Disclosed are a thin film transistor (TFT) including an oxide semiconductor layer capable of being applied to high-resolution flat panel display devices requiring high-speed driving, a gate driver including the TFT, and a display device including the gate driver. The TFT includes first oxide semiconductor layer consisting of indium-gallium-zinc-tin oxide (IGZTO) and a second oxide semiconductor layer including indium-gallium-zinc oxide (IGZO). A content ratio (Ga/In) of gallium (Ga) to indium (In) of the second oxide semiconductor layer is higher than a content (Ga/In) of Ga to In of the first oxide semiconductor layer, and a content ratio (Zn/In) of zinc (Zn) to In of the second oxide semiconductor layer is higher than a content (Zn/In) of Zn to In of the first oxide semiconductor layer.

公开(公告)号：US20190237493A1

公开(公告)日：2019-08-01

申请号：US16377136

申请日：2019-04-05

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  H01L29/04 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362 ,  H01L27/32

CPC classification number: H01L27/1251 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L21/8221 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/7869

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

公开(公告)号：US20150243686A1

公开(公告)日：2015-08-27

申请号：US14628378

申请日：2015-02-23

Applicant: LG DISPLAY CO., LTD.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/32 ,  H01L29/04

CPC classification number: H01L27/1251 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/7869

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract translation: 本公开涉及在相同基板上具有两种不同类型的薄膜晶体管的薄膜晶体管基板。 薄膜晶体管基板包括基板; 设置在所述基板上的第一薄膜晶体管，所述第一薄膜晶体管包括多晶半导体层，所述多晶半导体层上的第一栅电极，第一源电极和第一漏电极; 设置在所述基板上的第二薄膜晶体管，所述第二薄膜晶体管包括第二栅电极，所述第二栅电极上的氧化物半导体层，第二源电极和第二漏电极; 以及在所述氮化物层上包括氮化物层和氧化物层的中间绝缘层，所述中间绝缘层设置在所述第一栅电极和所述第二栅电极之上，并且位于所述氧化物半导体层的下方。

公开(公告)号：US20240136362A1

公开(公告)日：2024-04-25

申请号：US18378541

申请日：2023-10-09

Applicant: LG Display Co., Ltd.

Inventor： JeeHo PARK ,  Sohyung LEE ,  Hyunki KIM

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1255 ,  H01L27/127 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78696 ,  H10K59/1213

Abstract: A thin film transistor can include an active layer; a gate electrode at least partially overlapping with the active layer; and a source electrode and a drain electrode spaced apart from each other and connected to the active layer, respectively. Also, the active layer includes a channel overlapping with the gate electrode; a first connection portion connected to a first side of the channel portion; and a second connection portion connected to a second side of the channel portion. Also, the channel has a crystalline structure, the first connection portion includes a first amorphous portion contacting the channel, and the second connection portion includes a second amorphous portion contacting the channel.

公开(公告)号：US20240107827A1

公开(公告)日：2024-03-28

申请号：US18236245

申请日：2023-08-21

Applicant: LG Display Co., Ltd.

Inventor： JeeHo PARK ,  Sohyung LEE ,  JungHyun LEE

IPC: H10K59/126 ,  H10K59/121 ,  H10K59/123 ,  H10K59/124

CPC classification number: H10K59/126 ,  H10K59/1213 ,  H10K59/1216 ,  H10K59/123 ,  H10K59/124 ,  H10K2102/351

Abstract: Aspects of the present disclosure are directed to displayed devices wherein the characteristics of the transistor(s) may be maintained. In one aspect, a display panel includes a substrate; a first active layer on the substrate and including a channel, a first region positioned at a first side of the channel, and a second region positioned at a second side of the channel; a gate insulating film on the first active layer; a first electrode on the gate insulating film and electrically connected to the first region; a second electrode on the gate insulating film and electrically connected to the second region; a first insulating film on the gate insulating film and including a first hole overlapping at least a portion of the channel; and a third electrode overlapping the first hole.

公开(公告)号：US20210091233A1

公开(公告)日：2021-03-25

申请号：US17029889

申请日：2020-09-23

Applicant: LG Display Co., Ltd.

Inventor： JeongSuk YANG ,  KwangMin JO ,  Sohyung LEE

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/32

Abstract: An embodiment of the present disclosure provides a thin film transistor, a method of manufacturing the thin film transistor and a display apparatus including the thin film transistor. The thin film transistor includes an active layer on a substrate, a gate electrode disposed apart from the active layer to at least partially overlap the active layer, and a gate insulation layer between the active layer and the gate electrode. The gate insulation layer can cover an entire top surface of the active layer facing the gate electrode. The active layer can include a channel part overlapping the gate electrode, a conductivity-providing part which does not overlap the gate electrode, and an offset part between the channel part and the conductivity-providing part. The offset part may not overlap the gate electrode, and the conductivity-providing part can be doped with a dopant.

公开(公告)号：US20150243689A1

公开(公告)日：2015-08-27

申请号：US14629632

申请日：2015-02-24

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12

CPC classification number: H01L27/1251 ,  G02F1/13454 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same. A display includes a first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode on the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract translation: 本公开涉及在相同基板上具有两种不同类型的薄膜晶体管的薄膜晶体管基板和使用其的显示器。 显示器包括：第一薄膜晶体管，包括多晶半导体层，多晶半导体层上的第一栅极电极，第一源电极和第一漏极电极; 第二薄膜晶体管，包括第二栅电极，第二栅电极上的氧化物半导体层，第二源电极和第二漏电极; 以及在所述氮化物层上包括氮化物层和氧化物层的中间绝缘层，所述中间绝缘层设置在所述第一栅极电极和所述第二栅电极以及所述氧化物半导体层的下方。

公开(公告)号：US20230165047A1

公开(公告)日：2023-05-25

申请号：US18151849

申请日：2023-01-09

Applicant: LG Display Co., Ltd.

Inventor： SeungJin KIM ,  Sohyung LEE

IPC: H10K59/12 ,  H01L29/786

CPC classification number: H10K59/12 ,  H01L29/78618 ,  H01L29/7869

Abstract: Disclosed is a display apparatus including a first thin film transistor (TFT) and a second thin film transistor having a bottom gate structure and including an oxide semiconductor layer. The first TFT may be used as a switching device and the second TFT may be used as a driving device, and these TFTs have different operation properties from each other. One or more embodiments of the present disclosure provides a method of arranging a plurality of TFTs having different properties in a display apparatus. This not only provides a display apparatus with TFTs integrated at a high density but also an efficient way of driving the display apparatus.

公开(公告)号：US20220190003A1

公开(公告)日：2022-06-16

申请号：US17687537

申请日：2022-03-04

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/32 ,  H01L29/04

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.