公开(公告)号：US20150243685A1

公开(公告)日：2015-08-27

申请号：US14628357

申请日：2015-02-23

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Seongpil CHO ,  Jaehoon PARK ,  Sohyung LEE ,  Sangsoon NOH ,  Moonho PARK ,  Sungjin LEE ,  Seunghyo KO ,  Mijin JEONG

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/78606 ,  H01L29/78675 ,  H01L29/7869

Abstract: Provided are a thin film transistor substrate and a display using the same. A thin film transistor substrate includes: a substrate, a first thin film transistor disposed at a first area of the substrate, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed at a second area of the substrate, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, a nitride layer disposed on an area of the substrate, other than the second area, the nitride layer covering the first gate electrode, and an oxide layer disposed: over the first gate electrode and the second gate electrode, and under the oxide semiconductor layer.

Abstract translation: 提供一种薄膜晶体管基板和使用其的显示器。 薄膜晶体管基板包括：基板，设置在基板的第一区域的第一薄膜晶体管，所述第一薄膜晶体管包括：多晶半导体层，多晶半导体层上的第一栅电极，第一源电极 以及第一漏电极，设置在所述基板的第二区域的第二薄膜晶体管，所述第二薄膜晶体管包括：第二栅电极，所述第二栅电极上的氧化物半导体层，第二源电极和 第二漏电极，设置在基板的除了第二区域的区域上的氮化物层，覆盖第一栅电极的氮化物层和设置在第一栅极电极和第二栅电极之上的氧化物层， 氧化物半导体层。

公开(公告)号：US20190237493A1

公开(公告)日：2019-08-01

申请号：US16377136

申请日：2019-04-05

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  H01L29/04 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362 ,  H01L27/32

CPC classification number: H01L27/1251 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L21/8221 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/7869

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

公开(公告)号：US20150243686A1

公开(公告)日：2015-08-27

申请号：US14628378

申请日：2015-02-23

Applicant: LG DISPLAY CO., LTD.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/32 ,  H01L29/04

CPC classification number: H01L27/1251 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/7869

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract translation: 本公开涉及在相同基板上具有两种不同类型的薄膜晶体管的薄膜晶体管基板。 薄膜晶体管基板包括基板; 设置在所述基板上的第一薄膜晶体管，所述第一薄膜晶体管包括多晶半导体层，所述多晶半导体层上的第一栅电极，第一源电极和第一漏电极; 设置在所述基板上的第二薄膜晶体管，所述第二薄膜晶体管包括第二栅电极，所述第二栅电极上的氧化物半导体层，第二源电极和第二漏电极; 以及在所述氮化物层上包括氮化物层和氧化物层的中间绝缘层，所述中间绝缘层设置在所述第一栅电极和所述第二栅电极之上，并且位于所述氧化物半导体层的下方。

公开(公告)号：US20180151125A1

公开(公告)日：2018-05-31

申请号：US15665871

申请日：2017-08-01

Applicant: LG DISPLAY CO., LTD.

Inventor： Youngjang LEE

IPC: G09G3/3266 ,  G09G3/3275 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G3/3275 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2320/045 ,  G09G2354/00

Abstract: A display panel and an electroluminescence display using the same are discussed. The display panel includes pixels in which data lines and gate lines are crossed and which are arranged in a matrix form, and a gate driver configured to supply a gate pulse to the gate lines. Each pixel circuit of the pixels includes one or more n-type transistors and two or more p-type transistors. A gate driver of the display panel includes a first gate driving circuit configured to supply a first gate signal to an n-type transistor of the pixel circuit using a plurality of n-type transistors, a second gate driving circuit configured to supply a second gate signal to one of the p-type transistors of the pixel circuit using a plurality of p-type transistors, and a third gate driving circuit configured to supply a third gate signal to the other one of the p-type transistors of the pixel circuit using a plurality of n-type transistors.

公开(公告)号：US20150243689A1

公开(公告)日：2015-08-27

申请号：US14629632

申请日：2015-02-24

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12

CPC classification number: H01L27/1251 ,  G02F1/13454 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same. A display includes a first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode on the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract translation: 本公开涉及在相同基板上具有两种不同类型的薄膜晶体管的薄膜晶体管基板和使用其的显示器。 显示器包括：第一薄膜晶体管，包括多晶半导体层，多晶半导体层上的第一栅极电极，第一源电极和第一漏极电极; 第二薄膜晶体管，包括第二栅电极，第二栅电极上的氧化物半导体层，第二源电极和第二漏电极; 以及在所述氮化物层上包括氮化物层和氧化物层的中间绝缘层，所述中间绝缘层设置在所述第一栅极电极和所述第二栅电极以及所述氧化物半导体层的下方。

公开(公告)号：US20170098413A1

公开(公告)日：2017-04-06

申请号：US15283588

申请日：2016-10-03

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Jeanhan YOON

IPC: G09G3/3258 ,  G09G3/3266 ,  G09G3/3233 ,  G09G3/3275 ,  H01L27/32 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G3/3275 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2330/021 ,  G11C19/186 ,  G11C19/28

Abstract: Provided are an organic light-emitting diode (OLED) display and method of driving the same. An OLED display includes: a display panel including a plurality of pixels, each pixel including an OLED, an emission timing of each pixel being controlled in response to an EM signal, a shift register configured to generate an anti-phase EM signal based on gate shift clocks, and an inverter configured to: invert a phase of the anti-phase EM signal based on emission shift clocks, and generate the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are lower in a low-speed driving mode than in a normal driving mode, and wherein in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks.

公开(公告)号：US20150243688A1

公开(公告)日：2015-08-27

申请号：US14629538

申请日：2015-02-24

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Seongpil CHO ,  Jaehoon PARK ,  Sohyung LEE ,  Sangsoon NOH ,  Moonho PARK ,  Sungjin LEE ,  Seunghyo KO ,  Mijin JEONG

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1251 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/3262 ,  H01L29/7869

Abstract: Provided are a thin film transistor substrate and a display using the same. A display includes: a first area, a second area, a first thin film transistor disposed at the first area, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed at the second area, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, a nitride layer on an area of the display device, other than the second area, the nitride layer covering the first gate electrode, and an oxide layer disposed over the first gate electrode and the second gate electrode.

Abstract translation: 提供薄膜晶体管基板和使用其的显示器。 显示器包括：第一区域，第二区域，设置在第一区域的第一薄膜晶体管，所述第一薄膜晶体管包括：多晶半导体层，多晶半导体层上的第一栅电极，第一源电极， 以及第一漏极，设置在所述第二区的第二薄膜晶体管，所述第二薄膜晶体管包括：第二栅极，所述第二栅电极上的氧化物半导体层，第二源极和第二漏极， 显示装置的除了第二区域的区域上的氮化物层，覆盖第一栅电极的氮化物层和设置在第一栅电极和第二栅电极之上的氧化物层。

公开(公告)号：US20150243687A1

公开(公告)日：2015-08-27

申请号：US14628444

申请日：2015-02-23

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Hoyoung JUNG ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/32 ,  H01L29/04

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78675 ,  H01L29/7869

Abstract: Provided are a thin film transistor substrate and a display using the same. A thin film transistor substrate includes: a substrate, a first thin film transistor disposed on the substrate, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed on the substrate, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer.

Abstract translation: 提供一种薄膜晶体管基板和使用其的显示器。 薄膜晶体管基板包括：基板，设置在基板上的第一薄膜晶体管，所述第一薄膜晶体管包括：多晶半导体层，多晶半导体层上的第一栅电极，第一源极和第一 漏电极，设置在所述基板上的第二薄膜晶体管，所述第二薄膜晶体管包括：第二栅电极，所述第二栅电极上的氧化物半导体层，第二源电极和第二漏电极，中间绝缘层 包括在所述氮化物层上的氮化物层和氧化物层，所述中间绝缘层设置在所述第一栅电极和所述第二栅电极上以及所述氧化物半导体层下方，以及设置在所述氧化物半导体层上的蚀刻停止层。

公开(公告)号：US20220190003A1

公开(公告)日：2022-06-16

申请号：US17687537

申请日：2022-03-04

Applicant: LG Display Co., Ltd.

Inventor： Youngjang LEE ,  Kyungmo SON ,  Sohyung LEE ,  Moonho PARK ,  Sungjin LEE

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/32 ,  H01L29/04

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

公开(公告)号：US20170186781A1

公开(公告)日：2017-06-29

申请号：US15245944

申请日：2016-08-24

Applicant: LG DISPLAY CO., LTD.

Inventor： Soyoung NOH ,  Jinchae JEON ,  Seungchan CHOI ,  Junho LEE ,  Youngjang LEE ,  Sungbin RYU ,  Kitae KIM ,  Bokyoung CHO ,  Jeanhan YOON ,  Uijin CHUNG ,  Jihye LEE ,  Eunsung KIM ,  Hyunsoo SHIN ,  Kyeongju MOON ,  Hyojin KIM ,  Wonkyung KIM ,  Jeihyun LEE ,  Soyeon JE

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/417

CPC classification number: H01L27/1248 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3258 ,  H01L27/3262 ,  H01L28/60 ,  H01L29/41733 ,  H01L29/78675 ,  H01L29/7869

Abstract: A thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same are discussed. The thin film transistor substrate can include a substrate, a first thin film transistor (TFT), a second TFT, a first storage capacitor electrode, an oxide layer, a nitride layer, a second storage capacitor electrode, a planar layer and a pixel electrode. The first TFT is disposed in a first area, the second TFT is disposed in a second area, and the first storage capacitor electrode is disposed in a third area on the substrate respectively. The oxide layer covers the first and second TFTs, and exposes the first storage capacitor electrode. The nitride layer is disposed on the oxide layer and covers the first storage capacitor electrode. The second storage capacitor electrode overlaps with the first storage capacitor electrode on the nitride layer. The planar layer covers the first and second TFTs,and the second storage capacitor electrode. The pixel electrode is disposed on the planar layer.