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1.发明申请METHOD FOR FABRICATING MICROELECTRONIC DEVICES WITH ISOLATION TRENCHES PARTIALLY FORMED UNDER ACTIVE REGIONS 有权用于在有源区域部分地形成隔离斜面的微电子器件制造方法公开(公告)号：US20150294903A1
公开(公告)日：2015-10-15
申请号：US14425891
申请日：2012-09-05
IPC分类号： H01L21/762 , H01L21/306 , H01L21/265 , H01L21/84
CPC分类号： H01L21/76283 , H01L21/26506 , H01L21/26586 , H01L21/30604 , H01L21/3065 , H01L21/3086 , H01L21/76224 , H01L21/76232 , H01L21/84
摘要： A method of producing a microelectronic device in a substrate comprising a first semiconductor layer, a dielectric layer and a second semiconductor layer, comprising the following steps: etching a trench through the first semiconductor layer, the dielectric layer and a part of the thickness of the second semiconductor layer, thus defining, in the first semiconductor layer, one active region of the microelectronic device, ionic implantation in one or more side walls of the trench, at the level of the second semiconductor layer, modifying the crystallographic properties and/or the chemical properties of the implanted semiconductor, etching of the implanted semiconductor such that at least a part of the trench extends under a part of the active region, —filling of the trench with a dielectric material, forming an isolation trench surrounding the active region and comprising portions extending under a part of the active region.
摘要翻译： 一种在包括第一半导体层，电介质层和第二半导体层的衬底中制造微电子器件的方法，包括以下步骤：通过所述第一半导体层，所述电介质层和所述第一半导体层的厚度的一部分蚀刻沟槽 从而在所述第一半导体层中限定所述微电子器件的一个有源区域，在所述沟槽的一个或多个侧壁中的离子注入，在所述第二半导体层的水平处，修改所述晶体学性质和/或所述第二半导体层， 注入半导体的化学性质，蚀刻注入的半导体，使得沟槽的至少一部分在有源区的一部分下方延伸，用电介质材料填充沟槽，形成围绕有源区的隔离沟槽，并且包括 在有源区域的一部分下延伸的部分。
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2.发明授权Method for fabricating microelectronic devices with isolation trenches partially formed under active regions 有权用于制造具有在有源区域部分形成的隔离沟槽的微电子器件的方法公开(公告)号：US09437474B2
公开(公告)日：2016-09-06
申请号：US14425891
申请日：2012-09-05
IPC分类号： H01L21/76 , H01L21/762 , H01L21/84 , H01L21/3065 , H01L21/308 , H01L21/265 , H01L21/306
CPC分类号： H01L21/76283 , H01L21/26506 , H01L21/26586 , H01L21/30604 , H01L21/3065 , H01L21/3086 , H01L21/76224 , H01L21/76232 , H01L21/84
摘要： A method of producing a microelectronic device in a substrate comprising a first semiconductor layer, a dielectric layer and a second semiconductor layer, comprising the following steps: etching a trench through the first semiconductor layer, the dielectric layer and a part of the thickness of the second semiconductor layer, thus defining, in the first semiconductor layer, one active region of the microelectronic device, ionic implantation in one or more side walls of the trench, at the level of the second semiconductor layer, modifying the crystallographic properties and/or the chemical properties of the implanted semiconductor, etching of the implanted semiconductor such that at least a part of the trench extends under a part of the active region, —filling of the trench with a dielectric material, forming an isolation trench surrounding the active region and comprising portions extending under a part of the active region.
摘要翻译： 一种在包括第一半导体层，电介质层和第二半导体层的衬底中制造微电子器件的方法，包括以下步骤：通过所述第一半导体层，所述电介质层和所述第一半导体层的厚度的一部分蚀刻沟槽 从而在所述第一半导体层中限定所述微电子器件的一个有源区域，在所述沟槽的一个或多个侧壁中的离子注入，在所述第二半导体层的水平处，修改所述晶体学性质和/或所述第二半导体层， 注入半导体的化学性质，蚀刻注入的半导体，使得沟槽的至少一部分在有源区的一部分下方延伸，用电介质材料填充沟槽，形成围绕有源区的隔离沟槽，并且包括 在有源区域的一部分下延伸的部分。
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3.发明授权Method for producing a field effect transistor with implantation through the spacers 有权用于通过间隔物注入的场效应晶体管的制造方法公开(公告)号：US09070709B2
公开(公告)日：2015-06-30
申请号：US14119395
申请日：2011-06-09
IPC分类号： H01L29/66 , H01L21/8234 , H01L21/84 , H01L21/265
CPC分类号： H01L29/66477 , H01L21/2652 , H01L21/26586 , H01L21/823418 , H01L21/84 , H01L29/66545 , H01L29/66628 , H01L29/66772
摘要： The substrate successively includes a support substrate, an electrically insulating layer, a semiconductor material layer, and a gate pattern. The semiconductor material layer and gate pattern are covered by a covering layer. A first doping impurity is implanted in the semiconductor material layer through the covering layer so as to place the thickness of maximum concentration of the first doping impurity in the first layer. The covering layer is partly eliminated so as to form lateral spacers leaving source/drain electrodes free.
摘要翻译： 基板依次包括支撑基板，电绝缘层，半导体材料层和栅极图案。 半导体材料层和栅极图案被覆盖层覆盖。 第一掺杂杂质通过覆盖层注入到半导体材料层中，以将第一掺杂杂质的最大浓度的厚度置于第一层中。 覆盖层被部分地消除，以形成离开源极/漏电极的横向间隔物。
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4.发明申请METHOD FOR PRODUCING A FIELD EFFECT TRANSISTOR WITH IMPLANTATION THROUGH THE SPACERS 有权用于产生具有通过间隔物移植的场效应晶体管的方法公开(公告)号：US20140087524A1
公开(公告)日：2014-03-27
申请号：US14119395
申请日：2011-06-09
IPC分类号： H01L29/66
CPC分类号： H01L29/66477 , H01L21/2652 , H01L21/26586 , H01L21/823418 , H01L21/84 , H01L29/66545 , H01L29/66628 , H01L29/66772
摘要： The substrate successively includes a support substrate, an electrically insulating layer, a semiconductor material layer, and a gate pattern. The semiconductor material layer and gate pattern are covered by a covering layer. A first doping impurity is implanted in the semiconductor material layer through the covering layer so as to place the thickness of maximum concentration of the first doping impurity in the first layer. The covering layer is partly eliminated so as to form lateral spacers leaving source/drain electrodes free.
摘要翻译： 基板依次包括支撑基板，电绝缘层，半导体材料层和栅极图案。 半导体材料层和栅极图案被覆盖层覆盖。 第一掺杂杂质通过覆盖层注入到半导体材料层中，以将第一掺杂杂质的最大浓度的厚度置于第一层中。 覆盖层被部分地消除，以形成离开源极/漏电极的横向间隔物。
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公开(公告)号：US08994142B2
公开(公告)日：2015-03-31
申请号：US13439356
申请日：2012-04-04
IPC分类号： H01L21/70 , H01L27/12 , H01L21/44 , H01L29/786 , H01L21/74 , H01L21/762
CPC分类号： H01L29/78648 , H01L21/743 , H01L21/76283
摘要： The field effect transistor comprises a substrate successively comprising an electrically conducting support substrate, an electrically insulating layer and a semiconductor material layer. The counter-electrode is formed in a first portion of the support substrate facing the semi-conductor material layer. The insulating pattern surrounds the semi-conductor material layer to delineate a first active area and it penetrates partially into the support layer to delineate the first portion. An electrically conducting contact passes through the insulating pattern from a first lateral surface in contact with the counter-electrode through to a second surface. The contact is electrically connected to the counter-electrode.
摘要翻译： 场效应晶体管包括依次包括导电支撑衬底，电绝缘层和半导体材料层的衬底。 对置电极形成在支撑基板的面向半导体材料层的第一部分中。 绝缘图案围绕半导体材料层以描绘第一有源区域并且其部分地穿透到支撑层中以描绘第一部分。 导电接触通过绝缘图案从与对电极接触的第一侧表面穿过第二表面。 触点电连接到对电极。
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6.发明授权Method of producing insulation trenches in a semiconductor on insulator substrate 有权在绝缘体上半导体基板上制造绝缘沟槽的方法公开(公告)号：US08735259B2
公开(公告)日：2014-05-27
申请号：US13555356
申请日：2012-07-23
申请人： Yannick Le Tiec , Laurent Grenouillet , Maud Vinet
发明人： Yannick Le Tiec , Laurent Grenouillet , Maud Vinet
IPC分类号： H01L21/76
CPC分类号： H01L21/76 , H01L21/31111 , H01L21/31155 , H01L21/76237 , H01L21/76283
摘要： A method for producing one or plural trenches in a device comprising a substrate of the semiconductor on insulator type formed by a semiconductive support layer, an insulating layer resting on the support layer and a semiconductive layer resting on said insulating layer, the method comprising steps of: a) localised doping of a given portion of said insulating layer through an opening in a masking layer resting on the fine semiconductive layer, b) selective removal of said given doped area at the bottom of said opening.
摘要翻译： 一种在包括由半导体支撑层形成的绝缘体上半导体基板的基板和搁置在所述绝缘层上的绝缘层和置于所述绝缘层上的半导电层的器件中制造一个或多个沟槽的方法，所述方法包括以下步骤： ：a）通过位于精细半导体层上的掩模层中的开口局部掺杂所述绝缘层的给定部分，b）选择性地去除所述开口底部的所述给定掺杂区域。
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7.发明授权公开(公告)号：US08722499B2
公开(公告)日：2014-05-13
申请号：US13357061
申请日：2012-01-24
IPC分类号： H01L21/336
CPC分类号： H01L29/78603 , H01L29/0649 , H01L29/66772 , H01L29/78648
摘要： The field effect device is formed on a substrate of semiconductor on insulator type provided with a support substrate separated from a semiconductor film by an electrically insulating layer. The source and drain electrodes are formed in the semiconductor film on each side of the gate electrode. The electrically insulating layer comprises a first area having a first electric capacitance value between the semiconductor film and the support substrate facing the gate electrode. The electrically insulating layer comprises second and third areas having a higher electric capacitance value than the first value between the semiconductor film and the support substrate facing the source and drain electrodes.
摘要翻译： 场效应器件形成在具有通过电绝缘层与半导体膜分离的支撑衬底的绝缘体半导体衬底上。 源极和漏极形成在栅电极的每一侧的半导体膜中。 电绝缘层包括在半导体膜和支撑衬底之间具有面向栅电极的第一电容值的第一区域。 电绝缘层包括具有比半导体膜和支撑衬底面对源电极和漏电极的第一值更高的电容值的第二和第三区域。
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8.发明授权Field effect device provided with a localized dopant diffusion barrier area and fabrication method 有权具有局部掺杂剂扩散阻挡区域的场效应器件和制造方法公开(公告)号：US08603872B2
公开(公告)日：2013-12-10
申请号：US13356975
申请日：2012-01-24
IPC分类号： H01L21/336
CPC分类号： H01L29/78618 , H01L21/26586 , H01L29/66772 , H01L29/78696
摘要： The field effect device comprises a sacrificial gate electrode having side walls covered by lateral spacers formed on a semiconductor material film. The source/drain electrodes are formed in the semiconductor material film and are arranged on each side of the gate electrode. A diffusion barrier element is implanted through the void left by the sacrificial gate so as to form a modified diffusion area underneath the lateral spacers. The modified diffusion area is an area where the mobility of the doping impurities is reduced compared with the source/drain electrodes.
摘要翻译： 场效应器件包括牺牲栅极电极，其侧壁由形成在半导体材料膜上的横向间隔件覆盖。 源极/漏极形成在半导体材料膜中并且布置在栅电极的每一侧上。 扩散阻挡元件通过由牺牲栅极留下的空隙注入，以便在侧向间隔物下方形成修改的扩散区域。 改性扩散区域是与源/漏电极相比掺杂杂质的迁移率降低的区域。
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9.发明申请公开(公告)号：US20120190214A1
公开(公告)日：2012-07-26
申请号：US13357061
申请日：2012-01-24
IPC分类号： H01L21/31
CPC分类号： H01L29/78603 , H01L29/0649 , H01L29/66772 , H01L29/78648
摘要： The field effect device is formed on a substrate of semiconductor on insulator type provided with a support substrate separated from a semiconductor film by an electrically insulating layer. The source and drain electrodes are formed in the semiconductor film on each side of the gate electrode. The electrically insulating layer comprises a first area having a first electric capacitance value between the semiconductor film and the support substrate facing the gate electrode. The electrically insulating layer comprises second and third areas having a higher electric capacitance value than the first value between the semiconductor film and the support substrate facing the source and drain electrodes.
摘要翻译： 场效应器件形成在具有通过电绝缘层与半导体膜分离的支撑衬底的绝缘体半导体衬底上。 源极和漏极形成在栅电极的每一侧的半导体膜中。 电绝缘层包括在半导体膜和支撑衬底之间具有面向栅电极的第一电容值的第一区域。 电绝缘层包括具有比半导体膜和支撑衬底面对源电极和漏电极的第一值更高的电容值的第二和第三区域。
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10.发明授权公开(公告)号：US09396984B2
公开(公告)日：2016-07-19
申请号：US14425977
申请日：2012-05-09
申请人： Maud Vinet , Nicolas Loubet , Romain Wacquez
发明人： Maud Vinet , Nicolas Loubet , Romain Wacquez
IPC分类号： H01L21/00 , H01L21/762 , H01L21/311 , H01L29/04 , H01L29/06 , H01L21/8234 , H01L21/3065
CPC分类号： H01L21/76224 , H01L21/3065 , H01L21/31116 , H01L21/76232 , H01L21/76283 , H01L21/823481 , H01L29/04 , H01L29/045 , H01L29/0653 , H01L29/66772
摘要： A method of producing a microelectronic device in a substrate including a first semiconductor layer, a dielectric layer and a second monocrystalline semiconductor layer, the method including: etching a trench through the first semiconductor layer and the dielectric layer, and such that the trench delimits one active region of the microelectronic device; chemical vapor etching the second semiconductor layer, at a level of a bottom wall of the trench, according to at least two crystalline planes of the second semiconductor layer such that an etched part of the second semiconductor layer extends under a part of the active region; filling the trench and the etched part of the second semiconductor layer with a dielectric material.
摘要翻译： 一种在包括第一半导体层，电介质层和第二单晶半导体层的衬底中制造微电子器件的方法，所述方法包括：通过所述第一半导体层和所述介电层蚀刻沟槽，并且使得所述沟槽限定一个 微电子器件的有源区; 根据所述第二半导体层的至少两个晶面，使所述第二半导体层的蚀刻部分在所述有源区的一部分下方延伸，在所述沟槽的底壁的水平面刻蚀所述第二半导体层; 用介电材料填充沟槽和第二半导体层的蚀刻部分。
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