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公开(公告)号：US5929498A
公开(公告)日：1999-07-27
申请号：US40502
申请日：1998-03-17
IPC分类号： G01P15/125 , B81B3/00 , B81C1/00 , G01L9/00 , G01L9/12 , H01L21/762 , H01L21/764 , H01L21/768 , H01L23/10 , H01L29/84 , H01L29/82
CPC分类号： B81C1/00293 , B81C1/00301 , G01L9/0042 , G01L9/0073 , H01L21/76251 , H01L21/764 , H01L21/76898 , H01L23/10 , B81B2207/092 , B81C2203/019 , B81C2203/036 , H01L2924/0002
摘要： A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through. A via through the flexible structure to the first elevated region provides electrical contact with the active region. Another embodiment has either a surface or buried well in a semiconductor structure and extending from an active region in the cavity to a point outside the perimeter of the flexible structure. The well provides a conductive feed-through structure without creating imperfections that would interfere with the bonding that seals the cavity.
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2.发明授权Process for making a semiconductor sensor with a fusion bonded flexible structure 失效制造具有熔接粘结柔性结构的半导体传感器的工艺
公开(公告)号：US5576251A
公开(公告)日：1996-11-19
申请号：US395397
申请日：1995-02-22
CPC分类号： H01L29/84 , B81C1/00238 , G01B7/14 , G01L9/0073 , G01L9/0098 , G01P15/124 , B81B2203/0127 , B81C2203/036 , B81C2203/038 , G01P2015/0828
摘要： Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection. Alternatively, two transistors subjected to the same gate deflection provide a differential voltage related to the square root of the deflection if channel currents or channel widths differ. Transistors subjected to the different gate deflections provide a differential signal that cancels effects that are independent of deflection. A capacitive sensor includes a doped region underlying the center of a flexible membrane. The doped region is isolated from a surrounding region which is biased at the voltage of the membrane.
摘要翻译： 具有可移动结构的半导体器件的制造包括晶片的局部氧化和氧化物去除以在升高的结合表面中形成凹陷。 第二个晶片被熔合到提升的粘合表面上并成形为形成柔性膜。 替代的制造技术形成了在第一晶片上具有凹陷并且在第二晶片上具有有源区域的间隔物，并且在活性区域上将晶片与凹陷熔合在一起。 形成的器件可与标准MOS器件集成，包括FET，电容器和带有可移动膜的传感器。 FET传感器具有耦合在一起的栅极和漏极以及取决于栅极偏转的漏极 - 源极电压。 所选的工作电流，沟道长度和通道宽度提供与栅极偏转线性相关的漏极 - 源极电压。 或者，如果沟道电流或沟道宽度不同，则经受相同栅极偏转的两个晶体管提供与偏转的平方根相关的差分电压。 经受不同门极偏转的晶体管提供了抵消与偏转无关的影响的差分信号。 电容传感器包括在柔性膜的中心下方的掺杂区域。 掺杂区域与偏置在膜电压的周围区域隔离。
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公开(公告)号：US06495388B1
公开(公告)日：2002-12-17
申请号：US09538127
申请日：2000-03-29
申请人： M. Salleh Ismail
发明人： M. Salleh Ismail
IPC分类号： H01L2100
摘要： A surface micro-machined sensor uses a pedestal in a cavity to support a flexible structure and reduce the span of the flexible structure. The reduced span per sense area allows larger sensor areas without permitting forces to permanently deform the flexible structure or cause the structure to touch an opposite wall of the cavity. The flexible structure bonded to the pedestal and an elevated region surrounding the pedestal defines a cavity between the flexible membrane and a lower plane region. Active regions can be formed in the lower plane region for capacitors or transistors. A pedestal can be of various shapes including a circular, ovoid, rectangular or polygonal shape. The lower plane region can be of various shapes including a ring or donut shape, ovoid, rectangular or polygonal shape with an inner dimension corresponding to the outer dimension of the pedestal. The elevated region can be of various shapes with an inner dimension corresponding to the outer dimension of the lower plane region. Alternative embodiments of the invention include cavities containing multiple pedestals which may be concentric. Additionally, a central pedestal may be hollow to increase sensor volume. The device can be a capacitive sensor with plates in the active region and the flexible structure. The device can be a piezoresistive sensor with the flexible structure containing piezoresistive elements. The device can also be a transistor with source, drain, and channel in the active regions of the substrate and the flexible structure containing a gate.
摘要翻译： 表面微加工传感器使用空腔中的基座来支撑柔性结构并减小柔性结构的跨度。 每个感测区域的减小的跨度允许更大的传感器区域，而不允许力使柔性结构永久变形或使结构接触空腔的相对的壁。 结合到基座的柔性结构和围绕基座的升高区域在柔性膜和下平面区域之间限定空腔。 有源区可以形成在用于电容器或晶体管的下平面区域中。 基座可以是各种形状，包括圆形，卵形，矩形或多边形。 下平面区域可以是各种形状，包括环形或环形，卵形，矩形或多边形形状，其内部尺寸对应于基座的外部尺寸。 升高区域可以是具有对应于下平面区域的外部尺寸的内部尺寸的各种形状。 本发明的替代实施例包括包含可以同心的多个基座的空腔。 此外，中央基座可以是中空的，以增加传感器体积。 该器件可以是在有源区域和柔性结构中具有板的电容传感器。 该器件可以是具有包含压阻元件的柔性结构的压阻式传感器。 器件还可以是在衬底的有源区域中的源极，漏极和沟道的晶体管，以及包含栅极的柔性结构。
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公开(公告)号：US5578843A
公开(公告)日：1996-11-26
申请号：US318918
申请日：1994-10-06
CPC分类号： H01L29/84 , B81C1/00238 , G01B7/14 , G01L9/0073 , G01L9/0098 , G01P15/124 , B81B2203/0127 , B81C2203/036 , B81C2203/038 , G01P2015/0828
摘要： Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection. Alternatively, two transistors subjected to the same gate deflection provide a differential voltage related to the square root of the deflection if channel currents or channel widths differ. Transistors subjected to the different gate deflections provide a differential signal that cancels effects that are independent of deflection. A capacitive sensor includes a doped region underlying the center of a flexible membrane. The doped region is isolated from a surrounding region which is biased at the voltage of the membrane.
摘要翻译： 具有可移动结构的半导体器件的制造包括晶片的局部氧化和氧化物去除以在升高的结合表面中形成凹陷。 第二个晶片被熔合到提升的粘合表面上并成形为形成柔性膜。 替代的制造技术形成了在第一晶片上具有凹陷并且在第二晶片上具有有源区域的间隔物，并且在活性区域上将晶片与凹陷熔合在一起。 形成的器件可与标准MOS器件集成，包括FET，电容器和带有可移动膜的传感器。 FET传感器具有耦合在一起的栅极和漏极以及取决于栅极偏转的漏极 - 源极电压。 所选的工作电流，沟道长度和通道宽度提供与栅极偏转线性相关的漏极 - 源极电压。 或者，如果沟道电流或沟道宽度不同，则经受相同栅极偏转的两个晶体管提供与偏转的平方根相关的差分电压。 经受不同门极偏转的晶体管提供了抵消与偏转无关的影响的差分信号。 电容传感器包括在柔性膜的中心下方的掺杂区域。 掺杂区域与偏置在膜电压的周围区域隔离。
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公开(公告)号：US06211558B1
公开(公告)日：2001-04-03
申请号：US08896793
申请日：1997-07-18
IPC分类号： H01L2982
摘要： A surface micro-machined sensor uses a pedestal in a cavity to support a flexible structure and reduce the span of the flexible structure. The reduced span per sense area allows larger sensor areas without permitting forces to permanently deform the flexible structure or cause the structure to touch an opposite wall of the cavity. The flexible structure bonded to the pedestal and an elevated region surrounding the pedestal defines a cavity between the flexible membrane and a lower plane region. Active regions can be formed in the lower plane region for capacitors or transistors. A pedestal can be of various shapes including a circular, ovoid, rectangular or polygonal shape. The lower plane region can be of various shapes including a ring or donut shape, ovoid, rectangular or polygonal shape with an inner dimension corresponding to the outer dimension of the pedestal. The elevated region can be of various shapes with an inner dimension corresponding to the outer dimension of the lower plane region. Alternative embodiments of the invention include cavities containing multiple pedestals which may be concentric. Additionally, a central pedestal may be hollow to increase sensor volume. The device can be a capacitive sensor with plates in the active region and the flexible structure. The device can be a piezoresistive sensor with the flexible structure containing piezoresistive elements. The device can also be a transistor with source, drain, and channel in the active regions of the substrate and the flexible structure containing a gate.
摘要翻译： 表面微加工传感器使用空腔中的基座来支撑柔性结构并减小柔性结构的跨度。 每个感测区域的减小的跨度允许更大的传感器区域，而不允许力使柔性结构永久变形或使结构接触空腔的相对的壁。 结合到基座的柔性结构和围绕基座的升高区域在柔性膜和下平面区域之间限定空腔。 有源区可以形成在用于电容器或晶体管的下平面区域中。 基座可以是各种形状，包括圆形，卵形，矩形或多边形。 下平面区域可以是各种形状，包括环形或环形，卵形，矩形或多边形形状，其内部尺寸对应于基座的外部尺寸。 升高区域可以是具有对应于下平面区域的外部尺寸的内部尺寸的各种形状。 本发明的替代实施例包括包含可以同心的多个基座的空腔。 此外，中央基座可以是中空的，以增加传感器体积。 该器件可以是在有源区域和柔性结构中具有板的电容传感器。 该器件可以是具有包含压阻元件的柔性结构的压阻式传感器。 器件还可以是在衬底的有源区域中的源极，漏极和沟道的晶体管，以及包含栅极的柔性结构。
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公开(公告)号：US5966617A
公开(公告)日：1999-10-12
申请号：US717024
申请日：1996-09-20
申请人： M. Salleh Ismail
发明人： M. Salleh Ismail
IPC分类号： B81C99/00 , B81C1/00 , H01L21/316 , H01L21/32 , H01L21/762 , H01L21/465
CPC分类号： B81C1/00492 , H01L21/32
摘要： A multiple LOCOS (local oxidation) process shapes a surface of a substrate to form a series of planar regions which are vertically separated from each other. One exemplary process forms a hard mask layer for each LOCOS operation. Another exemplary process includes forming a silicon nitride mask layer and repeatedly changing the pattern of that mask layer. Each change in the pattern corresponds to a planar region to be formed; and after each change, oxide is grown in openings through the mask layer. The growth of oxide consumes part of the substrate and provides a vertical separation between the planar level corresponding to the pattern and a next higher planar level. Regions of the substrate once exposed by a mask pattern can remain exposed so that subsequent LOCOS operations maintain previously established separations between levels. A hard mask layer can include a polysilicon layer which protect a silicon nitride layer from conversion to oxide during the repeated LOCOS operations.
摘要翻译： 多个LOCOS（局部氧化）处理使基板的表面成形，以形成彼此垂直分离的一系列平面区域。 一个示例性处理为每个LOCOS操作形成硬掩模层。 另一示例性方法包括形成氮化硅掩模层并重复改变该掩模层的图案。 图案中的每个变化对应于要形成的平面区域; 在每次改变之后，通过掩模层在开口中生长氧化物。 氧化物的生长消耗了基板的一部分，并且在对应于图案的平面电平和下一较高的平面电平之间提供垂直间隔。 一旦通过掩模图案曝光的衬底的区域可以保持暴露，使得随后的LOCOS操作维持先前建立的级别之间的间隔。 硬掩模层可以包括在重复的LOCOS操作期间保护氮化硅层免于转化为氧化物的多晶硅层。
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公开(公告)号：US6008113A
公开(公告)日：1999-12-28
申请号：US81696
申请日：1998-05-19
申请人： M. Salleh Ismail , Jeffrey K. Wong
发明人： M. Salleh Ismail , Jeffrey K. Wong
IPC分类号： B29C43/36 , B29C43/56 , B32B37/00 , H01L20060101 , H01L21/00 , H01L21/18 , H01L21/30 , H01L21/44 , H01L21/46
CPC分类号： B29C43/3642 , B29C43/56 , B32B37/003 , H01L21/67092 , B29C2043/3266 , B29C2043/561 , B29C43/32 , B32B2309/68 , B32B2457/14 , H01L21/187
摘要： A jig for a fusion bonding process includes a sealable chamber having a first station for a first wafer and a second station for a second wafer. The wafers are initially separated from each other while a vacuum is created in the chamber. In one embodiment of the invention, movably mounted spacers separate the wafers while the vacuum is formed. The spacers are then moved to allow the wafers to come into contact and form an initial bond. In another embodiment, wafers in the first and second stations are tilted away from each other so that gravity keeps the wafers separated while the vacuum is formed. After the vacuum is formed, the chamber is rotated so that gravity pushes the two wafers together. In either embodiment, a mechanical pushing system or vibrational energy can apply force to induce or improve the initial bond. The initial bond seals cavities formed between the wafers. The jig can be transparent to infrared radiation or visible light to allow inspection of the initial bond and the sealing of the cavities. If the cavities are sealed, the wafers are removed from the chamber for annealing which strengthens the bond between the wafers. The cavities between the wafers inherit from the chamber a vacuum that helps to keep the wafers together during annealing.
摘要翻译： 用于熔接工艺的夹具包括具有用于第一晶片的第一工位和第二晶片的第二工位的可密封室。 在室内产生真空时，晶片最初彼此分离。 在本发明的一个实施例中，可移动安装的间隔件在形成真空的同时分离晶片。 然后移动间隔物以允许晶片接触并形成初始粘结。 在另一个实施例中，第一和第二站中的晶片相互倾斜，使得重力在形成真空的同时使晶片分离。 在形成真空之后，旋转腔室，使得重力将两个晶片推到一起。 在任一实施例中，机械推动系统或振动能量可以施加力以诱导或改善初始粘结。 初始粘结密封在晶片之间形成的空腔。 夹具可以对红外辐射或可见光透明，以便检查初始粘合和空腔的密封。 如果空腔被密封，则晶片从用于退火的室中移除，这加强了晶片之间的结合。 晶片之间的空腔从腔室继承有真空，有助于在退火过程中将晶片保持在一起。
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公开(公告)号：US5923952A
公开(公告)日：1999-07-13
申请号：US897124
申请日：1997-07-18
IPC分类号： G01P15/125 , B81B3/00 , B81C1/00 , G01L9/00 , G01L9/12 , H01L21/762 , H01L21/764 , H01L21/768 , H01L23/10 , H01L29/84 , H01L21/00
CPC分类号： B81C1/00293 , B81C1/00301 , G01L9/0042 , G01L9/0073 , H01L21/76251 , H01L21/764 , H01L21/76898 , H01L23/10 , B81B2207/092 , B81C2203/019 , B81C2203/036 , H01L2924/0002
摘要： A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through. A via through the flexible structure to the first elevated region provides electrical contact with the active region. Another embodiment has either a surface or buried well in a semiconductor structure and extending from an active region in the cavity to a point outside the perimeter of the flexible structure. The well provides a conductive feed-through structure without creating imperfections that would interfere with the bonding that seals the cavity.
摘要翻译： 半导体器件具有结合到半导体子结构以形成空腔的柔性结构。 柔性结构粘合在导电馈通上，而不会干扰通过接合形成的气密密封。 该装置的一个实施例包括含有扩散馈通边缘的凹陷，使得扩散边缘处的缺陷不会妨碍接合。 柔性结构结合到高架区域，从而隐藏缺陷。 在一个实施例中，第一升高区域被第二升高区域包围，并且用于馈通的扩散从空腔中的有源区域穿过第一升高区域延伸，扩散边缘在第一和第二升高区域之间。 因此，柔性结构可以连接到第一和第二升高区域而不受来自扩散馈通的边缘的干扰。 通过柔性结构到第一升高区域的通孔提供与活性区域的电接触。 另一个实施例具有半导体结构中的表面或掩埋阱，并且从空腔中的有源区域延伸到柔性结构的周边外的点。 该井提供导电的馈通结构，而不产生将干扰密封空腔的接合的缺陷。
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