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    POWER DETECTOR
    3.
    发明申请
    POWER DETECTOR 审中-公开
    电源检测器

    公开(公告)号：US20160334444A1

    公开(公告)日：2016-11-17

    申请号：US14963921

    申请日：2015-12-09

    Applicant: MediaTek Inc.

    Inventor： Meng-Hung Chen ,  Osama K.A. Shana'a ,  YuenHui Chee ,  Chiyuan Lu

    IPC: G01R21/06

    CPC classification number: G01R21/07

    Abstract: Some embodiments relate to power detector including a voltage sensor configured to detect a voltage of a load and a current sensor configured to detect a current of the load. The power detector also includes circuitry configured to introduce a phase delay between the detected voltage of the load and the detected current of the load, thereby producing a voltage measurement and a current measurement. The circuitry is also configured to multiply the voltage measurement and the current measurement.

    Abstract translation: 一些实施例涉及功率检测器，其包括被配置为检测负载的电压的电压传感器和被配置为检测负载电流的电流传感器。 功率检测器还包括被配置为在检测到的负载电压和负载的检测电流之间引入相位延迟的电路，从而产生电压测量和电流测量。 该电路还被配置为乘以电压测量和电流测量。

    Front-End Module And Coupling Compensation For Closed-Loop Digital Pre-Distortion System
    4.
    发明申请
    Front-End Module And Coupling Compensation For Closed-Loop Digital Pre-Distortion System 审中-公开
    闭环数字预失真系统的前端模块和耦合补偿

    公开(公告)号：US20160105299A1

    公开(公告)日：2016-04-14

    申请号：US14972038

    申请日：2015-12-16

    Applicant: MediaTek Inc.

    Inventor： YuenHui Chee ,  Fei Song ,  James Wang ,  Toru Matsuura ,  Osama K.A. Shana'a ,  Chiyuan Lu

    IPC: H04L27/00 ,  H03F3/21 ,  H03F1/02 ,  H03F3/19 ,  H04L25/08 ,  H04B1/40

    CPC classification number: H04L27/0002 ,  H03F1/0205 ,  H03F1/3241 ,  H03F1/3247 ,  H03F3/189 ,  H03F3/19 ,  H03F3/20 ,  H03F3/245 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2201/3236 ,  H04B1/0475 ,  H04B1/40 ,  H04B2001/0425 ,  H04L25/08 ,  H04L27/36 ,  H04L27/368

    Abstract: Examples of front-end modules, apparatuses and methods for coupling compensation in a closed-loop digital pre-distortion (DPD) system are described. The closed-loop DPD circuit may include a PA and a loopback path. The PA may receive a PA input signal and amplify the PA input signal to provide a PA output signal proportional to a product of the PA input signal and a gain of the PA. The loopback path may receive the PA output signal to output a loopback signal. A forward coupling and a backward coupling may exist between the PA input signal and an output of the loopback path. The output of the loopback path may be proportional to a product of the PA output signal and a gain of the loopback path. The loopback path may include a coupling cancellation mechanism configured to cancel couplings between the PA input signal and the loopback signal.

    Abstract translation: 描述了用于在闭环数字预失真（DPD）系统中耦合补偿的前端模块，装置和方法的示例。 闭环DPD电路可以包括PA和环回路径。 PA可以接收PA输入信号并放大PA输入信号，以提供与PA输入信号的乘积和PA的增益成比例的PA输出信号。 环回路径可以接收PA输出信号以输出环回信号。 在PA输入信号和环回路径的输出之间可能存在正向耦合和反向耦合。 环回路径的输出可能与PA输出信号与环回路径的增益的乘积成比例。 环回路径可以包括被配置为消除PA输入信号和环回信号之间的耦合的耦合消除机构。

    METHOD AND APPARATUS FOR CALIBRATING TRANSCEIVER
    5.
    发明申请
    METHOD AND APPARATUS FOR CALIBRATING TRANSCEIVER 有权

    公开(公告)号：US20250070894A1

    公开(公告)日：2025-02-27

    申请号：US18808063

    申请日：2024-08-18

    Applicant: MEDIATEK INC.

    Inventor： Ming-Chou Wu ,  Edmund, Wen Jen Leong ,  Chiyuan Lu ,  Ting-Che Tseng ,  Zhiming Deng

    IPC: H04B17/14

    Abstract: A calibration apparatus for calibrating a transceiver includes a loop back circuit, an estimation circuit, and a calibration circuit. The loop back circuit is coupled between a mixer output port of a transmitter (Tx) of the transceiver and a mixer input port of a receiver (Rx) of the transceiver, and applies a sequence of different loop gains. The estimation circuit receives a loop back receiving signal that is output from the Rx under the sequence of different loop gains, and generates at least one estimated value of impairment of the transceiver by performing channel estimation according to at least the loop back receiving signal. The calibration circuit performs calibration upon the transceiver according to the at least one estimated value.

    Power detector
    7.
    发明授权
    Power detector 有权

    公开(公告)号：US10082528B2

    公开(公告)日：2018-09-25

    申请号：US14963921

    申请日：2015-12-09

    Applicant: MediaTek Inc.

    Inventor： Meng-Hung Chen ,  Osama K. A. Shana'a ,  YuenHui Chee ,  Chiyuan Lu

    IPC: G01R21/07

    CPC classification number: G01R21/07

    Abstract: Some embodiments relate to power detector including a voltage sensor configured to detect a voltage of a load and a current sensor configured to detect a current of the load. The power detector also includes circuitry configured to introduce a phase delay between the detected voltage of the load and the detected current of the load, thereby producing a voltage measurement and a current measurement. The circuitry is also configured to multiply the voltage measurement and the current measurement.

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