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公开(公告)号：US11356388B2
公开(公告)日：2022-06-07
申请号：US17018962
申请日：2020-09-11
IPC分类号： H04L12/28 , H04L49/552 , H04L49/9057 , H04L49/25 , H04L45/44 , H04L47/24 , H04L47/34 , H04L47/10 , H04L47/30 , H04L12/54 , H04L12/70
摘要： Deadlocks in a multi-protocol heterogeneous packet-based transport system are avoided while maintaining real-time aspects. When receiving a plurality of packets from a root complex where contents of each packet from the plurality of packets organized in accordance with a first protocol, a sequence number is added to each packet and a packet type is identified. Every packet in the first plurality of packets is encapsulated into at least one packet organized in accordance with a second protocol to form a second plurality of packets organized in accordance with the second protocol. All the packets from the second plurality of packets are sent via a plurality of connections so that each connection from the plurality of connections only transports packets from the second plurality of packets that encapsulate packets from the first plurality that have a same packet type.
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公开(公告)号：US20220311715A1
公开(公告)日：2022-09-29
申请号：US17744176
申请日：2022-05-13
IPC分类号： H04L49/552 , H04L49/9057 , H04L49/25 , H04L45/44 , H04L47/24 , H04L47/34 , H04L47/10 , H04L47/30 , H04L12/54
摘要： Deterministic real-time multi-protocol heterogeneous packet-based transport is achieved by traffic shaping. When receiving a plurality of packets from a root complex where contents of each packet from the plurality of packets organized in accordance with a first protocol, a sequence number is added to each packet and a packet type is identified. Every packet in the first plurality of packets is encapsulated into at least one packet organized in accordance with a second protocol to form a second plurality of packets organized in accordance with the second protocol. All the packets from the second plurality of packets pass traffic scheduling or traffic shaping prior being sent via a plurality of connections to avoid burstiness and to achieve bounded transport latency in the plurality of connections, thereby providing deterministic real-time behavior in distributed systems.
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公开(公告)号：US10140049B2
公开(公告)日：2018-11-27
申请号：US14373023
申请日：2013-02-23
摘要： Within a partitioned system, a first system partition operates in a safety domain in which predictable operation of the first system partition is necessary to protect the system or operators of the system from harm. A second system partition operates in a user domain in which information supplied by the second system partition is not sufficiently reliable to be used by the first system partition within the safety domain. A mediator controller is connected between the first system partition and the second system partition. The mediator controller receives the information supplied by the first system partition. The mediator controller monitors and supervises use of the information by the second system partition in order maintain requirements of the safety domain to protect the system or operators of the system from harm.
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公开(公告)号：US20150180503A1
公开(公告)日：2015-06-25
申请号：US14419642
申请日：2013-08-16
IPC分类号： H03M3/00
CPC分类号： H03M3/458 , G06F17/5022 , G06F17/5054 , G06F17/5063 , H03M3/30 , H03M3/392 , H03M3/46 , H03M7/3015
摘要： An electronic system includes a configurable processing device. The configurable processing device includes a processor that performs digital processing, a first input that receives digital signal, a first output that sends digital signal and a converter that converts between analog and digital signals. The converter includes a delta-sigma modulator.
摘要翻译： 电子系统包括可配置的处理装置。 可配置处理装置包括执行数字处理的处理器，接收数字信号的第一输入端，发送数字信号的第一输出端和在模拟信号和数字信号之间转换的转换器。 该转换器包括一个Δ-Σ调制器。
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公开(公告)号：US20140380001A1
公开(公告)日：2014-12-25
申请号：US14373023
申请日：2013-02-23
IPC分类号： G06F3/06
CPC分类号： G06F3/0644 , G06F3/061 , G06F3/0673 , G06F9/5077 , G06F21/53 , G06F21/554 , G06F2003/0692 , H04L63/02 , H04L67/12 , Y02D10/22 , Y02D10/36
摘要： Within a partitioned system, a first system partition operates in a safety domain in which predictable operation of the first system partition is necessary to protect the system or operators of the system from harm. A second system partition operates in a user domain in which information supplied by the second system partition is not sufficiently reliable to be used by the first system partition within the safety domain. A mediator controller is connected between the first system partition and the second system partition. The mediator controller receives the information supplied by the first system partition. The mediator controller monitors and supervises use of the information by the second system partition in order maintain requirements of the safety domain to protect the system or operators of the system from harm.
摘要翻译： 在分区系统中，第一系统分区在其中需要第一系统分区的可预测的操作以保护系统的系统或操作者免受危害的安全域中操作。 第二系统分区在用户域中操作，其中由第二系统分区提供的信息不够可靠以供安全域内的第一系统分区使用。 中介控制器连接在第一系统分区和第二系统分区之间。 中介控制器接收第一个系统分区提供的信息。 调解员控制器监视和监督第二系统分区对信息的使用，以维护安全域的要求，以保护系统的系统或操作者免受伤害。
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公开(公告)号：US20150234960A1
公开(公告)日：2015-08-20
申请号：US14419643
申请日：2013-08-16
CPC分类号： G06F17/5036 , G06F17/5022 , G06F17/5054 , G06F17/5063 , H03M3/30 , H03M3/392 , H03M3/458 , H03M3/46 , H03M7/3015
摘要： Configuration information is generated for a configurable mixed-signal system. Analog requirements for operating the configurable mixed-signal system are gathered. A simulation model of a delta-sigma modulator is received. A simulation based on the simulation model of the delta-sigma modulator is performed to obtain parameter settings for the delta-sigma modulator. The obtained parameter settings are used to build at least a portion of a description of the configurable mixed-signal system. The description of the configurable mixed signal system is synchronized to receive configuration information.
摘要翻译： 为可配置的混合信号系统生成配置信息。 收集用于操作可配置混合信号系统的模拟要求。 接收了Δ-Σ调制器的仿真模型。 执行基于Δ-Σ调制器的仿真模型的模拟以获得Δ-Σ调制器的参数设置。 获得的参数设置用于构建可配置混合信号系统的描述的至少一部分。 可配置混合信号系统的描述被同步以接收配置信息。
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公开(公告)号：US11695708B2
公开(公告)日：2023-07-04
申请号：US17744176
申请日：2022-05-13
IPC分类号： H04L12/28 , H04L49/552 , H04L49/9057 , H04L49/25 , H04L45/44 , H04L47/24 , H04L47/34 , H04L47/10 , H04L47/30 , H04L12/54 , H04L12/70
CPC分类号： H04L49/552 , H04L12/56 , H04L45/44 , H04L47/24 , H04L47/30 , H04L47/34 , H04L47/39 , H04L49/25 , H04L49/9057 , H04L2012/5652 , H04L2212/00
摘要： Deterministic real-time multi-protocol heterogeneous packet-based transport is achieved by traffic shaping. When receiving a plurality of packets from a root complex where contents of each packet from the plurality of packets organized in accordance with a first protocol, a sequence number is added to each packet and a packet type is identified. Every packet in the first plurality of packets is encapsulated into at least one packet organized in accordance with a second protocol to form a second plurality of packets organized in accordance with the second protocol. All the packets from the second plurality of packets pass traffic scheduling or traffic shaping prior being sent via a plurality of connections to avoid burstiness and to achieve bounded transport latency in the plurality of connections, thereby providing deterministic real-time behavior in distributed systems.
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公开(公告)号：US20200296058A1
公开(公告)日：2020-09-17
申请号：US16892177
申请日：2020-06-03
IPC分类号： H04L12/939 , H04L12/861 , H04L12/947 , H04L12/721 , H04L12/851 , H04L12/54 , H04L12/801 , H04L12/835
摘要： For secure transport, when receiving a plurality of packets from a root complex where contents of each packet from the plurality of packets organized in accordance with a first protocol, a sequence number is added to each packet and a packet type is identified. Every packet in the first plurality of packets is encrypted and encapsulated into at least one packet organized in accordance with a second protocol to form a second plurality of packets organized in accordance with the second protocol. All the packets from the second plurality of packets are sent via a plurality of connections so that each connection from the plurality of connections only transports packets from the second plurality of packets that encapsulate packets from the first plurality that have a same packet type.
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公开(公告)号：US10509880B2
公开(公告)日：2019-12-17
申请号：US14419643
申请日：2013-08-16
摘要： Configuration information is generated for a configurable mixed-signal system. Analog requirements for operating the configurable mixed-signal system are gathered. A simulation model of a delta-sigma modulator is received. A simulation based on the simulation model of the delta-sigma modulator is performed to obtain parameter settings for the delta-sigma modulator. The obtained parameter settings are used to build at least a portion of a description of the configurable mixed-signal system. The description of the configurable mixed signal system is synchronized to receive configuration information.
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公开(公告)号：US09209828B2
公开(公告)日：2015-12-08
申请号：US14419642
申请日：2013-08-16
CPC分类号： H03M3/458 , G06F17/5022 , G06F17/5054 , G06F17/5063 , H03M3/30 , H03M3/392 , H03M3/46 , H03M7/3015
摘要： An electronic system includes a configurable processing device. The configurable processing device includes a processor that performs digital processing, a first input that receives digital signal, a first output that sends digital signal and a converter that converts between analog and digital signals. The converter includes a delta-sigma modulator.
摘要翻译： 电子系统包括可配置的处理装置。 可配置处理装置包括执行数字处理的处理器，接收数字信号的第一输入端，发送数字信号的第一输出端和在模拟信号和数字信号之间转换的转换器。 该转换器包括一个Δ-Σ调制器。
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