公开(公告)号：US07152131B2

公开(公告)日：2006-12-19

申请号：US10329350

申请日：2002-12-27

申请人： Makoto Saen ,  Kei Suzuki

发明人： Makoto Saen ,  Kei Suzuki

IPC分类号： G06F13/40 ,  G06F13/12 ,  G06F13/14

CPC分类号： G06F13/4022

摘要： In a data processor including a master circuit that issues an access request and slave circuits that perform processing in response to the access request received from the master circuit, the disclosed invention enables the master circuit to access all data areas of the slave circuits even if the master circuit does not have an access command in data size suitable for accessing the slave circuit. An access size control unit that can convert access size input from the master circuit to data size in which the slave circuit accepts access is installed between the master circuit and the slave circuit. The access size control unit retains at least one address for access size setting. As the master circuit accesses the appropriate address for access size setting, the access size conversion procedure can be carried out.

公开(公告)号：US20060059284A1

公开(公告)日：2006-03-16

申请号：US11202280

申请日：2005-08-12

申请人： Makoto Saen ,  Kei Suzuki

发明人： Makoto Saen ,  Kei Suzuki

IPC分类号： G06F13/36

CPC分类号： G06F13/364

摘要： A data processing device which, even if congestion occurs on a bus circuit of a specific processing circuit in an LSI in which multiple circuit modules are connected by buses, can fully actualize the performance potential of the system on chip. Buses and slave circuits on which accesses concentrate are provided with observation blocks. Each observation block has a mechanism to notify system control circuits such as a clock controller and master circuits such as CPU cores of the acquired status information, and each master circuit further has a mechanism capable of dynamically altering the priority order for notifying the bus circuits and slave circuits of the priority order of processing.

摘要翻译： 一种数据处理装置，即使在通过总线连接多个电路模块的LSI中的特定处理电路的总线电路上发生拥塞，也能够充分实现片上系统的性能潜力。 带有观察块的访问集中的巴士和从属电路。 每个观测块具有通知诸如时钟控制器和所获取的状态信息的CPU核心的主电路的系统控制电路的机制，并且每个主电路还具有能够动态地改变用于通知总线电路的优先级顺序的机构， 从电路处理的优先级顺序。

公开(公告)号：US20070260791A1

公开(公告)日：2007-11-08

申请号：US11822966

申请日：2007-07-11

申请人： Makoto Saen ,  Kei Suzuki

发明人： Makoto Saen ,  Kei Suzuki

IPC分类号： G06F13/20

CPC分类号： G06F13/364

摘要： A data processing device which, even if congestion occurs on a bus circuit of a specific processing circuit in an LSI in which multiple circuit modules are connected by buses, can fully actualize the performance potential of the system on chip. Buses and slave circuits on which accesses concentrate are provided with observation blocks. Each observation block has a mechanism to notify system control circuits such as a clock controller and master circuits such as CPU cores of the acquired status information, and each master circuit further has a mechanism capable of dynamically altering the priority order for notifying the bus circuits and slave circuits of the priority order of processing.

摘要翻译： 一种数据处理装置，即使在通过总线连接多个电路模块的LSI中的特定处理电路的总线电路上发生拥塞，也能够充分实现片上系统的性能潜力。 带有观察块的访问集中的巴士和从属电路。 每个观测块具有通知诸如时钟控制器和所获取的状态信息的CPU核心的主电路的系统控制电路的机制，并且每个主电路还具有能够动态地改变用于通知总线电路的优先级顺序的机构， 从电路处理的优先级顺序。

公开(公告)号：US08421679B2

公开(公告)日：2013-04-16

申请号：US12715887

申请日：2010-03-02

申请人： Kei Suzuki ,  Masaki Matsushima ,  Naoaki Utagawa ,  Tetsuya Shibata

发明人： Kei Suzuki ,  Masaki Matsushima ,  Naoaki Utagawa ,  Tetsuya Shibata

IPC分类号： H01Q1/38

CPC分类号： H01Q1/38 ,  H01Q1/243 ,  H01Q9/0421 ,  H01Q9/045

摘要： An antenna device includes an antenna element and a printed circuit board on which the antenna element is mounted. The antenna element includes a base, a radiation conductor formed on an upper surface of the substrate and one end of the radiation conductor being an open end, a plurality of terminal electrodes formed on a bottom surface of the substrate, and a loop conductor of a substantially U-shape. The loop conductor is arranged to face one of the terminal electrodes via a gap having a predetermined width. An antenna mounting region is provided on a upper surface of the printed circuit board to be adjacent to an edge of a long side of the printed circuit board. A feed line is led in the antenna mounting region along the edge. One and the other end of the loop conductor are connected to the feed line and a ground pattern, respectively.

摘要翻译： 天线装置包括天线元件和安装天线元件的印刷电路板。 天线元件包括基底，形成在基底的上表面上的辐射导体，辐射导体的一端是开口端，形成在基底的底表面上的多个端子电极和 大致U形。 环形导体被布置为经由具有预定宽度的间隙面对一个端子电极。 在印刷电路板的上表面设置有与印刷电路板的长边的边缘相邻的天线安装区域。 馈电线沿着边缘被引导到天线安装区域中。 环形导体的一端和另一端分别连接到馈电线和接地图案。

公开(公告)号：US07953571B2

公开(公告)日：2011-05-31

申请号：US11882213

申请日：2007-07-31

申请人： Toshiyuki Odaka ,  Keiro Muro ,  Minoru Ogushi ,  Kei Suzuki ,  Shoji Suzuki

发明人： Toshiyuki Odaka ,  Keiro Muro ,  Minoru Ogushi ,  Kei Suzuki ,  Shoji Suzuki

IPC分类号： G06F3/00

CPC分类号： H04L43/12 ,  H04L41/06 ,  H04L41/22 ,  H04L43/0829 ,  H04L67/125 ,  H04L69/28

摘要： In a sensor network system comprising a sensor terminal and a management server, the sensor terminal transmits observation data acquired using the sensor, the management server has a latest data storage manager which manages the latest observation data among observation data received from the sensor terminal, a history data storage manager which manages the history of the observation data from any time when data was received from the sensor terminal to the latest observation data, and a missing data manager which manages missing history data, and compensates the missing history data based on a predetermined rule, and when a request for such observation data is received, at least one of the latest observation data managed by the latest data storage manager, and history data wherein the missing data has been compensated and managed by the history data storage manager, is output according to the type of request.

摘要翻译： 在包括传感器终端和管理服务器的传感器网络系统中，传感器终端发送使用传感器获取的观测数据，管理服务器具有管理从传感器终端接收的观测数据中的最新观测数据的最新数据存储管理器， 历史数据存储管理器，其管理从传感器终端接收数据到最新观测数据的任何时间的观察数据的历史;以及丢失数据管理器，其管理丢失历史数据，并且基于预定的历史数据补偿丢失的历史数据 规则，并且当接收到对这种观察数据的请求时，输出由最新数据存储管理器管理的最新观测数据中的至少一个以及由历史数据存储管理器补偿和管理丢失数据的历史数据 根据请求的类型。

公开(公告)号：US20090232366A1

公开(公告)日：2009-09-17

申请号：US12314844

申请日：2008-12-17

申请人： Toshio Okochi ,  Kei Suzuki ,  Kazuhiko Matsumoto

发明人： Toshio Okochi ,  Kei Suzuki ,  Kazuhiko Matsumoto

IPC分类号： G06K9/00 ,  G06F3/033

CPC分类号： G06Q10/10

摘要： Provided is an information processing system which has a plurality of tags, a tag reader, a digital-pen, and a server. The plurality of tags each hold a tag identifier. The tag reader reads the tag identifier held in each of the plurality of tags. The digital-pen reads location information, which identifies a location where handwriting is made on paper. The server keeps work record including information that associates the tag identifier recorded in the server in advance with the location on paper. When it is judged that the read tag identifier and a handwriting location identified by the location information are associated with each other, the server judges whether or not the read tag identifier matches the tag identifier recorded in advance that is associated by the work record with the handwriting location identified by the location information. The server outputs a result of the judging.

摘要翻译： 提供了具有多个标签，标签读取器，数字笔和服务器的信息处理系统。 多个标签各自保存标签标识符。 标签读取器读取保存在多个标签中的每一个中的标签标识符。 数字笔读取位置信息，其标识在纸上进行手写的位置。 服务器保存工作记录，包括将服务器中记录的标签标识符与纸张上的位置预先相关联的信息。 当判断出读取的标签标识符和由位置信息识别的手写位置彼此相关联时，服务器判断读取的标签标识符是否与预先记录的与工作记录相关联的标签标识符与 由位置信息识别的手写位置。 服务器输出判断结果。

公开(公告)号：US07547975B2

公开(公告)日：2009-06-16

申请号：US10900458

申请日：2004-07-28

申请人： Minoru Takaya ,  Hisayuki Abe ,  Kei Suzuki ,  Kosuke Takano ,  Kenichi Kawabata ,  Toshikazu Endo

发明人： Minoru Takaya ,  Hisayuki Abe ,  Kei Suzuki ,  Kosuke Takano ,  Kenichi Kawabata ,  Toshikazu Endo

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/82 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/05026 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/82039 ,  H01L2224/82138 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/185 ,  H01L2924/00 ,  H01L2224/05599

摘要： A module with embedded semiconductor IC of the present invention includes a first resin layer, a second resin layer, post electrodes passing through the first and second resin layers, and a semiconductor IC mounted as embedded between the first resin layer and the second resin layer. Stud bumps are formed on land electrodes of the semiconductor IC and positioned with respect to the post electrodes. Owing to this positioning of the stud bumps formed on the semiconductor IC with respect to the post electrodes, the planar position of the stud bumps is substantially fixed. As a result, it is possible to use a semiconductor IC having a very narrow electrode pitch of 100 μm or smaller, particularly of around 60 μm.

摘要翻译： 具有本发明的嵌入式半导体IC的模块包括：第一树脂层，第二树脂层，通过第一和第二树脂层的柱电极;以及安装在第一树脂层和第二树脂层之间的半导体IC。 在半导体IC的接地电极上形成有柱状突起，并相对于柱状电极配置。 由于在半导体IC上相对于柱状电极形成的柱状凸块的这种定位，螺柱凸块的平面位置基本上是固定的。 结果，可以使用非常窄的电极间距为100μm或更小，特别是约60μm的半导体IC。

公开(公告)号：US20080071892A1

公开(公告)日：2008-03-20

申请号：US11826301

申请日：2007-07-13

申请人： Keiro Muro ,  Toshiyuki Odaka ,  Minoru Ogushi ,  Kei Suzuki ,  Shoji Suzuki ,  Kazuki Watanabe

发明人： Keiro Muro ,  Toshiyuki Odaka ,  Minoru Ogushi ,  Kei Suzuki ,  Shoji Suzuki ,  Kazuki Watanabe

IPC分类号： G06F15/177

CPC分类号： H04L41/06 ,  H04L41/0803 ,  H04W88/14

摘要： A sensor node may be used for another purpose for a moment and may also be replaced. By configuring, for a sensor node, a logic node which is provided with the physical node use information indicating whether or not the sensor node is in use and the logical node use information indicating whether or not the sensor node is provided as a logic node, a sensor node to be replaced may be specified based on the replacement request of the sensor node, a sensor node is selected which is configured as logic node providing the physical node use information indicating that the sensor node is not used and the logic node use information indicating that the sensor node is provided as the logic node, thus selected sensor node is identified as the replacing sensor node to achieve the replacement from the replaced sensor node to the replacing sensor node.

摘要翻译： 传感器节点可以用于另一目的一段时间，也可以被替换。 通过为传感器节点配置提供有物理节点的逻辑节点使用指示传感器节点是否在使用中的信息，并且逻辑节点使用指示传感器节点是否被提供为逻辑节点的信息， 可以基于传感器节点的替换请求来指定要替换的传感器节点，选择被配置为逻辑节点的传感器节点，其提供指示不使用传感器节点的物理节点使用信息，并且逻辑节点使用信息 指示传感器节点被提供为逻辑节点，因此所选择的传感器节点被识别为替换传感器节点，以实现从更换的传感器节点到替换传感器节点的替换。

公开(公告)号：US20070088634A1

公开(公告)日：2007-04-19

申请号：US11483612

申请日：2006-07-11

申请人： Kazuhiko Matsumoto ,  Toshiyuki Aritsuka ,  Kei Suzuki

发明人： Kazuhiko Matsumoto ,  Toshiyuki Aritsuka ,  Kei Suzuki

IPC分类号： G06Q10/00

CPC分类号： G06Q10/06 ,  G06Q10/087

摘要： A conventional problem with commodity quality control in a traceability system is inability to appropriately change settings for quality measurement according to environmental changes. The present invention provides a system which solves the problem and realizes real-time quality control with low power consumption. In the system for commodity quality control and operations management according to the present invention, an IC tag and a sensor node for quality measurement are attached to each commodity. The system has a mechanism for detecting either one or both of a change in the location of the commodity and a change in the work performed for the commodity. The sensor node for quality measurement can appropriately change settings for quality measurement according to a change in the location of the commodity or in the work performed for the commodity.

摘要翻译： 可追溯性系统中的商品质量控制的常规问题是不能根据环境变化适当地改变质量测量的设置。 本发明提供一种解决该问题的系统，实现低功耗的实时质量控制。 在根据本发明的商品质量控制和操作管理系统中，每个商品都附有用于质量测量的IC标签和传感器节点。 该系统具有检测商品位置变化和商品所进行工作变化的一种或两种的机制。 用于质量测量的传感器节点可以根据商品位置的改变或对商品的工作进行适当的改变质量测量的设置。

公开(公告)号：US07187961B2

公开(公告)日：2007-03-06

申请号：US10457498

申请日：2003-06-10

申请人： Shunzo Yamashita ,  Kei Suzuki ,  Toshiyuki Aritsuka ,  Masayuki Miyazaki ,  Sadaki Nakano

发明人： Shunzo Yamashita ,  Kei Suzuki ,  Toshiyuki Aritsuka ,  Masayuki Miyazaki ,  Sadaki Nakano

IPC分类号： A61B5/00

CPC分类号： A61B5/0002 ,  A61B5/02055 ,  A61B5/02427 ,  A61B5/0531 ,  A61B5/11 ,  A61B5/7232 ,  A61B2560/0209 ,  A61B2560/0412 ,  A61B2562/0219 ,  A61B2562/028 ,  A61B2562/08 ,  G01D9/005 ,  G01K7/01 ,  G01K2215/00 ,  G01P15/125 ,  G01P2015/0814 ,  H01L35/32 ,  H01L2924/0002 ,  Y10S128/903 ,  H01L2924/00

摘要： A semiconductor device is employable for a compact and light-weight sensor system that is free of the need for battery replacement. The semiconductor device has a sensor chip (SCHIP1) comprising sensors (TD1, AS1, PD1, GS1), an A/D conversion circuit (AD1), a microprocessor (CPU1), a memory (MEM1), a transmission circuit (RF1), and a power generation circuit (CM1). The sensors, the A/D conversion circuit, the microprocessor, the memory, and the transmission circuit are formed on one side (SIDE1) of a substrate, while the power generation unit is formed on the other side (SIDE2) of the substrate.

摘要翻译： 半导体器件可用于紧凑且轻量的传感器系统，其不需要更换电池。 半导体器件具有传感器芯片（SCHIP1），包括传感器（TD1，AS1，PD1，GS1），A / D转换电路（AD 1），微处理器（CPU 1），存储器 ），发送电路（RF 1）和发电电路（CM 1）。 传感器，A / D转换电路，微处理器，存储器和传输电路形成在衬底的一侧（SIDE 1）上，而发电单元形成在衬底的另一侧（SIDE 2）上 基质。