SYSTEM FOR DYNAMIC PROJECTION OF MEDIA
    1.
    发明申请
    SYSTEM FOR DYNAMIC PROJECTION OF MEDIA 审中-公开
    动态投影系统

    公开(公告)号:US20140111629A1

    公开(公告)日:2014-04-24

    申请号:US13795295

    申请日:2013-03-12

    IPC分类号: H04N9/31

    摘要: A system for presenting an image on a user in a social setting includes an image projection system configured to detect the presence of a user via their mobile device when the user comes within a predefined proximity, such as within a real-world social setting (e.g., coffeehouse, bar, club, etc.). The image projection system is further configured to access a social network platform and detect media content associated with the user, particularly media content that the user has shared on the social network platform via their mobile device. The image projection system is further configured to project media content onto the user's body, clothing and/or personal items via a projector and dynamically adapt projection of the media content in the event the user moves within the social setting.

    摘要翻译: 用于在社交设置中在用户上呈现图像的系统包括:图像投影系统,被配置为当用户进入预定义的接近度期间(例如在真实世界的社会环境中)(例如,用户)在其移动设备中检测用户的存在。 ,咖啡馆,酒吧,俱乐部等)。 图像投影系统还被配置为访问社交网络平台并检测与用户相关联的媒体内容,特别是用户已经通过其移动设备在社交网络平台上共享的媒体内容。 图像投影系统还被配置为经由投影仪将媒体内容投影到用户的身体,衣服和/或个人物品上,并且在用户在社交环境中移动的情况下动态地调整媒体内容的投影。

    Write combining buffer that supports snoop request
    3.
    发明授权
    Write combining buffer that supports snoop request 有权
    写入组合缓冲区,支持窥探请求

    公开(公告)号:US06366984B1

    公开(公告)日:2002-04-02

    申请号:US09309726

    申请日:1999-05-11

    IPC分类号: G06F1208

    摘要: A write combining buffer that supports snoop requests includes a first cache memory and a second cache memory. The apparatus also includes a write combining buffer, coupled to the first and second cache memories, to combine data from a plurality of store operations. Each of the plurality of store operations is to at least a part of a cache line, and the write combining buffer can be snooped in response to requests initiated external to the apparatus.

    摘要翻译: 支持窥探请求的写入组合缓冲器包括第一缓存存储器和第二高速缓冲存储器。 该装置还包括耦合到第一和第二高速缓存存储器的组合缓冲器,以组合来自多个存储操作的数据。 多个存储操作中的每一个都是高速缓存线的至少一部分,并且可以响应于在该设备外部发起的请求来窥探该写入组合缓冲器。

    Methods and apparatus for thermal management of an integrated circuit die
    4.
    发明授权
    Methods and apparatus for thermal management of an integrated circuit die 有权
    集成电路管芯的热管理方法和装置

    公开(公告)号:US07158911B2

    公开(公告)日:2007-01-02

    申请号:US10821822

    申请日:2004-04-09

    IPC分类号: H01L31/58

    摘要: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

    摘要翻译: 集成的片上热管理系统,提供IC器件的闭环温度控制和执行IC器件热管理的方法。 热管理系统包括温度检测元件,功率调制元件,控制元件和可见度元件。 温度检测元件包括用于检测管芯温度的温度传感器。 功率调制元件可以通过直接降低IC器件的功耗来限制IC器件执行指令的速度,通过限制由IC器件执行的指令的数量,或通过 这些技术的组合。 控制元件允许控制热管理系统的行为,并且可见性元件允许外部设备监视热管理系统的状态。

    Breaking replay dependency loops in a processor using a rescheduled replay queue
    5.
    发明授权
    Breaking replay dependency loops in a processor using a rescheduled replay queue 失效
    使用重新安排的重播队列在处理器中重新播放依赖循环

    公开(公告)号:US06981129B1

    公开(公告)日:2005-12-27

    申请号:US09705668

    申请日:2000-11-02

    IPC分类号: G06F9/38 G06F9/30

    CPC分类号: G06F9/3842 G06F9/3861

    摘要: Breaking replay dependency loops in a processor using a rescheduled replay queue. The processor comprises a replay queue to receive a plurality of instructions, and an execution unit to execute the plurality of instructions. A scheduler is coupled between the replay queue and the execution unit. The scheduler speculatively schedules instructions for execution and increments a counter for each of the plurality of instructions to reflect the number of times each of the plurality of instructions has been executed. The scheduler also dispatches each instruction to the execution unit either when the counter does not exceed a maximum number of replays or, if the counter exceeds the maximum number of replays, when the instruction is safe to execute. A checker is coupled to the execution unit to determine whether each instruction has executed successfully. The checker is also coupled to the replay queue to communicate to the replay queue each instruction that has not executed successfully.

    摘要翻译: 使用重新安排的重播队列在处理器中重新播放依赖循环。 所述处理器包括用于接收多个指令的重放队列,以及执行所述多个指令的执行单元。 调度器耦合在重播队列和执行单元之间。 调度器推测性地调度用于执行的指令,并且为多个指令中的每一个递增计数器,以反映多个指令中的每一个已被执行的次数。 当计数器不超过最大重放次数时,或者当计数器超过最大重放次数时,当指令执行安全时,调度器也将每条指令分派给执行单元。 检查器耦合到执行单元以确定每个指令是否已成功执行。 检查器还耦合到重播队列,以便与未执行成功的每个指令通信给重播队列。

    Maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses
    6.
    发明授权
    Maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses 有权
    通过检查未接收的加载指令的负载地址来监视存储地址来维护处理器的顺序

    公开(公告)号:US06687809B2

    公开(公告)日:2004-02-03

    申请号:US10279601

    申请日:2002-10-24

    IPC分类号: G06F938

    CPC分类号: G06F9/3851 G06F9/3834

    摘要: An apparatus in a first processor includes a first data structure to store addresses of store instruction dispatched during a last predetermined number of cycles. The apparatus further includes logic to determine whether a load address of a load instruction being executed matches one of the store addresses in the first data structure. The apparatus still further includes logic to replay to the respective load instruction if the load address of the respective load instruction matches of the store addresses in the first data structure.

    摘要翻译: 第一处理器中的装置包括第一数据结构,用于存储在最后预定次数周期期间调度的存储指令的地址。 该装置还包括用于确定正在执行的加载指令的加载地址是否与第一数据结构中的存储地址之一匹配的逻辑。 如果各个加载指令的加载地址与第一数据结构中的存储地址匹配,则该装置还包括重放相应加载指令的逻辑。

    MULTI-SENSORIAL EMOTIONAL EXPRESSION
    7.
    发明申请
    MULTI-SENSORIAL EMOTIONAL EXPRESSION 审中-公开
    多传感情绪表达

    公开(公告)号:US20130346920A1

    公开(公告)日:2013-12-26

    申请号:US13687846

    申请日:2012-11-28

    IPC分类号: G06F3/0482

    摘要: Storage medium, method and apparatus associated with multi-sensorial expression of emotion to photos/pictures are disclosed herein. In embodiments, at least one storage medium may include a number of instructions configured to enable a computing device, in response to execution of the instructions by the computing device, to display a number of images having associated emotion classifications on a display device accessible to a number of users, and facilitate the number of users to individually and/or jointly modify the emotion classifications of the images in a multi-sensorial manner. Other embodiments may be disclosed or claimed.

    摘要翻译: 本文公开了与感光对照片/图片的多感觉表现相关联的存储介质,方法和装置。 在实施例中,至少一个存储介质可以包括多个指令,其被配置为使得计算设备能够响应于计算设备的指令的执行而在显示设备上显示具有相关联的情绪分类的数量的图像, 用户数量,并且方便用户以多感觉方式个体地和/或共同地修改图像的情感分类。 可以公开或要求保护其他实施例。

    Technique for synchronizing faults in a processor having a replay system
    8.
    发明授权
    Technique for synchronizing faults in a processor having a replay system 有权
    在具有重放系统的处理器中同步故障的技术

    公开(公告)号:US07159154B2

    公开(公告)日:2007-01-02

    申请号:US10614215

    申请日:2003-07-08

    IPC分类号: G06F11/00

    摘要: A computer processor includes a replay system to replay instructions which have not executed properly and a first event pipeline coupled to the replay system to process instructions including any replayed instructions. A second event pipeline is provided to perform additional processing on an instruction. The second event pipeline has an ability to detect one or more faults occurring therein. The processor also includes a synchronization circuit coupled between the first event pipeline and the second event pipeline to synchronize faults occurring in the second event pipeline to matching instruction entries in the first event pipeline.

    摘要翻译: 计算机处理器包括重播系统以重播没有正确执行的指令以及耦合到重放系统的第一事件流水线来处理包括任何重播指令的指令。 提供第二个事件流水线来对指令执行附加处理。 第二事件管道具有检测其中发生的一个或多个故障的能力。 处理器还包括耦合在第一事件流水线和第二事件流水线之间的同步电路,用于将第二事件流水线中发生的故障与第一事件流水线中的匹配指令条目进行同步。

    Technique for synchronizing faults in a processor having a replay system
    10.
    发明授权
    Technique for synchronizing faults in a processor having a replay system 有权
    在具有重放系统的处理器中同步故障的技术

    公开(公告)号:US06629271B1

    公开(公告)日:2003-09-30

    申请号:US09472839

    申请日:1999-12-28

    IPC分类号: H02H305

    摘要: A computer processor includes a replay system to replay instructions which have not executed properly and a first event pipeline coupled to the replay system to process instructions including any replayed instructions. A second event pipeline is provided to perform additional processing on an instruction. The second event pipeline has an ability to detect one or more faults occurring therein. The processor also includes a synchronization circuit coupled between the first event pipeline and the second event pipeline to synchronize faults occurring in the second event pipeline to matching instruction entries in the first event pipeline.

    摘要翻译: 计算机处理器包括重播系统以重播没有正确执行的指令以及耦合到重放系统的第一事件流水线来处理包括任何重播指令的指令。 提供第二个事件流水线来对指令执行附加处理。 第二事件管道具有检测其中发生的一个或多个故障的能力。 处理器还包括耦合在第一事件流水线和第二事件流水线之间的同步电路,用于将第二事件流水线中发生的故障与第一事件流水线中的匹配指令条目进行同步。