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公开(公告)号：US6125217A
公开(公告)日：2000-09-26
申请号：US105502
申请日：1998-06-26
CPC分类号： G02B6/43 , G06F1/105 , G02B6/4249
摘要： A method and an apparatus for providing an optical clock distribution network. In one embodiment, an optical source is configured to emit optical pulses at a desired clock frequency. The optical pulses are separated into a plurality of split optical pulses, each of which is received by a clock receiver node in a semiconductor die. In one embodiment, each clock receiver node locally generates a photocurrent in response to the split optical beams. Each of the photocurrents is locally converted into voltage and thus into local clock signals, which are used to clock the local area of the integrated circuit. In one embodiment, the semiconductor die includes an additional clock receiver node used to clock a clock generation circuit included in the semiconductor die. The clock generation circuit generates clock signals that are in phase with each other and the other clock signals generated throughout the semiconductor die. In one embodiment, the clock signals generated by the clock generation circuit are used to clock and phase lock input/output communications on the semiconductor die as well as off chip input/output communications between the semiconductor die and other external semiconductor dice of the system.
摘要翻译： 一种用于提供光时钟分配网络的方法和装置。 在一个实施例中，光源被配置为以期望的时钟频率发射光脉冲。 光脉冲被分离成多个分裂光脉冲，每个分裂光脉冲由半导体管芯中的时钟接收器节点接收。 在一个实施例中，响应于分离的光束，每个时钟接收器节点局部地产生光电流。 每个光电流被局部地转换成电压并因此被转换成本地时钟信号，这些时钟信号用于对集成电路的局部区域进行时钟。 在一个实施例中，半导体管芯包括用于对包括在半导体管芯中的时钟产生电路进行时钟的附加时钟接收器节点。 时钟发生电路产生彼此同相的时钟信号和在整个半导体管芯中产生的其它时钟信号。 在一个实施例中，由时钟产生电路产生的时钟信号用于在半导体管芯上进行时钟和锁相输入/输出通信，以及半导体管芯与系统的其它外部半导体管芯之间的离线输入/输出通信。
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2.发明授权Method and apparatus for optically modulating light through the back side of an integrated circuit die 失效通过集成电路管芯的背侧对光进行光学调制的方法和装置
公开(公告)号：US6075908A
公开(公告)日：2000-06-13
申请号：US993786
申请日：1997-12-19
CPC分类号： G02F1/218 , G02B2006/12107 , G02B2006/12142 , G02F2001/0152 , G02F2201/307
摘要： An optical modulator that modulates light through the semiconductor substrate through the back side of a flip chip packaged integrated circuit. The optical modulator of the present invention enables integrated circuit signals to be extracted through the back side of the semiconductor substrate. In one embodiment, an optical modulator is disposed within a flip chip packaged integrated circuit die. The optical modulator includes a deflector and a diffraction grating. An infrared light beam is directed through the back side of a silicon substrate of the integrated circuit die, deflected off the deflector through the diffraction grating and back out the back side of the integrated circuit die. The diffraction grating modulates the phase of a portion of the deflected light beam in response to an integrated circuit signal. A resulting diffraction interference occurs between the phase modulated portions and non-phase modulated portions of the deflected light beam. The interference causes amplitude modulation of a zero order diffraction of the deflected light beam, from which the integrated circuit signal can be extracted.
摘要翻译： 一种光学调制器，其通过倒装芯片封装集成电路的背面来调制通过半导体衬底的光。 本发明的光调制器能够通过半导体基板的背面提取集成电路信号。 在一个实施例中，光学调制器设置在倒装芯片封装集成电路管芯内。 光学调制器包括偏转器和衍射光栅。 红外光束被引导通过集成电路管芯的硅衬底的背面，通过衍射光栅偏转偏转器并从集成电路管芯的背面退出。 衍射光栅响应于集成电路信号调制偏转光束的一部分的相位。 在偏转光束的相位调制部分和非相位调制部分之间产生衍射干涉。 干扰引起偏转光束的零级衍射的幅度调制，可从中提取集成电路信号。
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3.发明授权Method and apparatus using an infrared laser based optical probe for measuring voltages directly from active regions in an integrated circuit 有权使用基于红外激光的光学探针的方法和装置，用于直接从集成电路中的有源区测量电压
公开(公告)号：US6072179A
公开(公告)日：2000-06-06
申请号：US130741
申请日：1998-08-07
IPC分类号： G01R1/06 , G01N21/41 , G01R19/00 , G01R31/302 , G01R31/311 , G01R31/28
CPC分类号： G01R31/311
摘要： A method and an apparatus for detecting an electric field in the active regions of an integrated circuit disposed in a semiconductor. In one embodiment, a laser beam is operated at a wavelength greater than approximately 0.9 .mu.m. The laser beam is focused onto a P-N junction, such as for example the drain of a MOS transistor, through the back side of the semiconductor substrate. As a result of free carrier absorption, the laser beam is partially absorbed near the P-N junction. When a signal is impressed on the P-N junction, the degree of free carrier absorption will be modulated in accordance with the modulation of the depletion region near the P-N junction. The laser beam passes through the P-N junction region, reflects off the oxide interface and metal behind the junction, and returns back through the P-N junction and back out of the silicon surface. Amplitude modulation in this reflected laser beam is detected with an optical detection system.
摘要翻译： 一种用于检测设置在半导体中的集成电路的有源区域中的电场的方法和装置。 在一个实施例中，激光束以大于约0.9μm的波长工作。 激光束通过半导体衬底的背面聚焦到P-N结，例如MOS晶体管的漏极。 作为自由载体吸收的结果，激光束在P-N结附近被部分吸收。 当在P-N结上施加信号时，将根据P-N结附近的耗尽区的调制来调制自由载流子吸收的程度。 激光束穿过P-N结区域，从结点后面的氧化物界面和金属反射出来，并通过P-N结返回并返回硅表面。 用光学检测系统检测该反射激光束中的幅度调制。
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4.发明授权Method and apparatus providing optical input/output through the back side of an integrated circuit die 失效通过集成电路管芯的背侧提供光输入/输出的方法和装置
公开(公告)号：US6049639A
公开(公告)日：2000-04-11
申请号：US995277
申请日：1997-12-19
CPC分类号： G02B6/43 , H01L25/105 , H01L2924/0002
摘要： A method and an apparatus providing optical input/output in an integrated circuit. In one embodiment, optical modulators and demodulators, which are coupled to integrated circuit input/output nodes, are disposed on or within the back side semiconductor substrate of a flip chip packaged integrated circuit. Since a flip chip packaged integrated circuit die is utilized, full access to the optical modulators and demodulators is provided from the back side of the integrated circuit die for optical input/output. In one embodiment, a heat sink including a light source and an optical assembly is thermally and optically coupled to the back side of the integrated circuit die. A light beam is directed to the optical modulators and the deflected modulated light beam is routed and directed to the optical demodulators to realize optical input/output. In one embodiment, infrared light may be utilized such that the optical modulators and demodulators are disposed within a silicon semiconductor substrate. Since silicon is partially transparent to infrared light, optical input/output is realized through the back side and through the semiconductor substrate of the flip chip packaged integrated circuit die.
摘要翻译： 一种在集成电路中提供光输入/输出的方法和装置。 在一个实施例中，耦合到集成电路输入/输出节点的光调制器和解调器设置在倒装芯片封装集成电路的背面半导体衬底上或其内部。 由于利用了倒装芯片封装的集成电路管芯，所以从用于光输入/输出的集成电路管芯的背面提供对光调制器和解调器的完全访问。 在一个实施例中，包括光源和光学组件的散热器被热和光耦合到集成电路管芯的背面。 光束被引导到光调制器，并且偏转的调制光束被路由并被引导到光解调器以实现光输入/输出。 在一个实施例中，可以利用红外光，使得光学调制器和解调器设置在硅半导体衬底内。 由于硅对红外光部分透明，所以通过背面和通过倒装芯片封装的集成电路裸片的半导体衬底实现光输入/输出。
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公开(公告)号：US06587605B2
公开(公告)日：2003-07-01
申请号：US09780174
申请日：2001-02-09
IPC分类号： G02B612
摘要： A method and an apparatus providing an optical interconnection in an integrated circuit die. In one embodiment, an optical interconnection is used to optically interconnect a waveguide-based optical modulator through the insulating layer and back side of the semiconductor substrate of the integrated circuit die. In one embodiment, an insulating oxide layer is disposed between a semiconductor waveguide optical modulator and the back side of the semiconductor substrate. Optical conduits are disposed in the insulating oxide layer at the locations where light enters and exits the semiconductor waveguide optical modulator. In one embodiment, the optical conduits have indexes of refraction substantially equal to the indexes of refraction of the semiconductor substrate and the semiconductor waveguide optical modulator. Thus, attenuation of the light used to optically couple the semiconductor waveguide optical modulator through the back side of the semiconductor substrate is reduced.
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公开(公告)号：US4766372A
公开(公告)日：1988-08-23
申请号：US13006
申请日：1987-02-10
申请人： Valluri R. M. Rao
发明人： Valluri R. M. Rao
CPC分类号： G01N23/2251 , H01J37/04 , H01J37/268
摘要： An electron beam tester for fault detection and isolation in large and very large scale integrated circuits. An electron optical column focuses a primary beam of electrons on the surface of a circuit chip. An immersion extractor provides an electrical field to attract secondary electrons emitted from the irradiated surface. Secondary electrons are detected in an integral spectrometer. A wide bore final lens and integral high resolution double defection scan coils enable large area voltage contrast imaging as well as quantitative waveform measurement from internal nodes of the circuit chip.
摘要翻译： 用于大型和大规模集成电路中的故障检测和隔离的电子束测试仪。 电子光学柱将电子束的一次电子束聚焦在电路芯片的表面上。 浸没提取器提供电场以吸引从辐射表面发射的二次电子。 二次电子在积分光谱仪中检测。 宽孔最终镜头和整体高分辨率双重扫描线圈可实现大面积电压对比成像以及电路芯片内部节点的定量波形测量。
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公开(公告)号：US4961812A
公开(公告)日：1990-10-09
申请号：US243787
申请日：1988-09-13
申请人： William Baerg , Valluri R. M. Rao
发明人： William Baerg , Valluri R. M. Rao
IPC分类号： H01J37/32
CPC分类号： H01J37/32623 , H01J37/32633 , Y10S156/914
摘要： An apparatus and a method to inhibit sputtering of undesirable material onto a dielectric layer of an integrated circuit being etched. After exposing the integrated circuit within its package, the leads of the integrated circuit are electrically coupled together by a metallic foil. The metallic foil is wrapped about the package to also provide thermal coupling, however, the integrated circuit is left exposed. Then, the integrated circuit is placed onto an etch-resilient plate disposed atop a cathode electrode. An opening in the plate allows direct placement of the integrated circuit onto the cathode. An etch-resilient cover is placed above the plate opening and the integrated circuit, but the cover has an opening to expose the integrated circuit. During etching, the cover inhibits sputtering from the leads, preform and bond wires.
摘要翻译： 一种抑制不需要的材料溅射到正被蚀刻的集成电路的电介质层上的装置和方法。 在将集成电路暴露在其封装内之前，集成电路的引线通过金属箔电耦合在一起。 金属箔被卷绕在包装上以提供热耦合，然而，集成电路被暴露。 然后，将集成电路放置在设置在阴极电极顶部的蚀刻弹性板上。 板上的开口允许将集成电路直接放置到阴极上。 蚀刻弹性盖被放置在板开口和集成电路的上方，但是盖具有用于暴露集成电路的开口。 在蚀刻期间，盖子禁止从引线，预成型件和接合线进行溅射。
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8.发明授权Method and apparatus for performing a circuit edit through the back side of an integrated circuit die 有权用于通过集成电路管芯的背面执行电路编辑的方法和装置
公开(公告)号：US6150718A
公开(公告)日：2000-11-21
申请号：US240141
申请日：1999-01-29
IPC分类号： H01L21/768 , H01L23/525 , H01L23/48
CPC分类号： H01L23/525 , H01L21/76892 , H01L2924/0002
摘要： A method and an apparatus for performing circuit edits through the back side of a flip-chip packaged integrated circuit die. In one embodiment, a circuit edit is achieved by exposing first and second circuit edit connection targets through a semiconductor substrate of the integrated circuit die from the back side. Next, an insulating layer is deposited over the first and second circuit edit connection targets and the exposed semiconductor substrate. Next, the circuit edit connection targets are re-exposed through the insulating layer and a conductor is deposited over the re-exposed circuit edit connection targets and the deposited insulating layer from the back side of the integrated circuit to couple together the circuit edit connection targets.
摘要翻译： 一种用于通过倒装芯片封装集成电路管芯的背面进行电路编辑的方法和装置。 在一个实施例中，电路编辑通过使第一和第二电路编辑连接目标从背面暴露于集成电路管芯的半导体衬底来实现。 接下来，绝缘层沉积在第一和第二电路编辑连接目标和暴露的半导体衬底上。 接下来，电路编辑连接目标通过绝缘层再曝光，并且导体从集成电路的背面沉积在再曝光的电路编辑连接目标和沉积的绝缘层上，以将电路编辑连接目标 。
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9.发明授权Method and apparatus providing a mechanical probe structure in an integrated circuit die 失效在集成电路管芯中提供机械探针结构的方法和装置
公开(公告)号：US5976980A
公开(公告)日：1999-11-02
申请号：US941887
申请日：1997-09-30
IPC分类号： H01J37/305 , H01L21/66 , H01L23/544 , H01L21/00
CPC分类号： H01J37/3056 , B24B37/013 , H01L22/26 , H01L23/544 , H01J2237/30466 , H01L2223/5442 , H01L2223/54473 , H01L2223/5448 , H01L2224/16 , H01L2224/48091 , H01L24/48 , H01L2924/00014 , H01L2924/01039 , H01L2924/12042 , H01L2924/14 , H01L2924/15312 , H01L2924/1532 , H01L2924/19041 , H01L2924/30107 , H01L2924/3025
摘要： A method and an apparatus providing a mechanical probe structure through the back side of an integrated circuit die. In one embodiment, semiconductor substrate is thinned from the back side of the integrated circuit die above a probe target. The probe target is then exposed and a thin insulating layer is formed over the exposed probe target and the nearby semiconductor substrate. The thin insulating layer provides electrical isolation between the exposed probe target and the bulk semiconductor substrate. The thin insulating layer also provides a base insulating platform for a probe pad that is subsequently deposited. After the insulating layer is formed over the exposed probe target and the nearby semiconductor substrate, the probe target is re-exposed through insulating layer such that a probe pad may be deposited over the probe target to provide electrical contact to the original probe target as well as provide a probe pad for mechanical probing purposes from the back side of the integrated circuit die.
摘要翻译： 一种通过集成电路管芯的背面提供机械探针结构的方法和装置。 在一个实施例中，半导体衬底从集成电路管芯的背面被稀释到探针靶上方。 然后暴露探针靶，并且在暴露的探针靶和附近的半导体衬底上形成薄的绝缘层。 薄绝缘层提供暴露的探针靶和体半导体衬底之间的电隔离。 薄绝缘层还提供了随后沉积的探针垫的基底绝缘平台。 在暴露的探针靶和附近的半导体衬底上形成绝缘层之后，通过绝缘层再次暴露探测靶，使得探针焊盘可以沉积在探针上，以提供与原始探测靶的电接触 从集成电路管芯的背面提供用于机械探测目的的探针焊盘。
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10.发明授权Method for performing a circuit edit through the back side of an integrated circuit die 失效用于通过集成电路管芯的背面执行电路编辑的方法
公开(公告)号：US5904486A
公开(公告)日：1999-05-18
申请号：US940624
申请日：1997-09-30
IPC分类号： H01L21/768 , H01L23/525 , H01L21/66
CPC分类号： H01L23/525 , H01L21/76892 , H01L2924/0002
摘要： A method and an apparatus for performing circuit edits through the back side of a flip-chip packaged integrated circuit die. In one embodiment, a circuit edit is achieved by exposing first and second circuit edit connection targets through a semiconductor substrate of the integrated circuit die from the back side. Next, an insulating layer is deposited over the first and second circuit edit connection targets and the exposed semiconductor substrate. Next, the circuit edit connection targets are re-exposed through the insulating layer and a conductor is deposited over the re-exposed circuit edit connection targets and the deposited insulating layer from the back side of the integrated circuit to couple together the circuit edit connection targets.
摘要翻译： 一种用于通过倒装芯片封装集成电路管芯的背面进行电路编辑的方法和装置。 在一个实施例中，电路编辑通过使第一和第二电路编辑连接目标从背面暴露于集成电路管芯的半导体衬底来实现。 接下来，绝缘层沉积在第一和第二电路编辑连接目标和暴露的半导体衬底上。 接下来，电路编辑连接目标通过绝缘层再曝光，并且导体从集成电路的背面沉积在再曝光的电路编辑连接目标和沉积的绝缘层上，以将电路编辑连接目标 。
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