公开(公告)号：US20060019422A1

公开(公告)日：2006-01-26

申请号：US11233665

申请日：2005-09-23

Applicant: Mark Tuttle ,  James Deak

Inventor： Mark Tuttle ,  James Deak

IPC: H01L21/00

CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  Y10S257/921 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer's specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.

公开(公告)号：US20060234397A1

公开(公告)日：2006-10-19

申请号：US11451925

申请日：2006-06-12

Applicant: James Deak

Inventor： James Deak

IPC: H01L21/00

CPC classification number: B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/3272 ,  H01F41/304 ,  H01L43/12

Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.

公开(公告)号：US20050164414A1

公开(公告)日：2005-07-28

申请号：US10764832

申请日：2004-01-26

Applicant: James Deak

Inventor： James Deak

IPC: G11C11/16 ,  H01F10/32 ,  H01F41/30 ,  H01L21/00 ,  H01L43/12

CPC classification number: B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/3272 ,  H01F41/304 ,  H01L43/12

Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.

Abstract translation: 提供了一种制造用于MRAM器件的固定层的方法。 该方法包括提供固定层。 固定层包括衬底上的反铁磁钉扎层和钉扎层上的铁磁性钉扎层，钉扎层具有第一厚度。 固定层还包括被钉扎层上的间隔层，以及间隔层上方的铁磁参考层，参考层具有第二厚度。 该方法还包括使用时间温度/磁场分布对固定层进行退火，该轮廓具有最大磁场强度（H H 3退火）。 基于被钉扎层的第一厚度和参考层的第二厚度来选择轮廓。

公开(公告)号：US20080042834A1

公开(公告)日：2008-02-21

申请号：US11788616

申请日：2007-04-20

Applicant: James Daughton ,  James Deak

Inventor： James Daughton ,  James Deak

IPC: G08B13/24

CPC classification number: G01R33/093 ,  B82Y25/00 ,  G11C11/1695

Abstract: A tamper detecting enclosure arrangement for enclosures containing an interior space in which a protected item is positioned having a magnetoresistive sensing memory storage cell positioned in or near the protected item in the enclosure having a two state offset magnetoresistance versus externally applied magnetic field. A magnet is positioned at a selected separation distance from the magnetoresistive sensing memory storage cell to thereby provide a magnetic field about the magnetoresistive sensing memory storage cell if said enclosure has not been opened in such a manner as to result in substantially increasing said separation distance.

Abstract translation: 一种用于包含内部空间的篡改检测外壳装置，其中被保护物品被定位在其中，其具有位于所述外壳中的受保护物品内或附近的磁阻感测存储器单元，其具有与外部施加的磁场相对的两个状态偏移磁阻。 磁体位于与磁阻感测存储单元相隔一定距离的距离处，从而如果所述外壳未被打开，从而提供磁阻感测存储单元周围的磁场，导致大大增加所述间隔距离。

公开(公告)号：US20060077707A1

公开(公告)日：2006-04-13

申请号：US11249046

申请日：2005-10-12

Applicant: James Deak

Inventor： James Deak

IPC: G11C11/14

CPC classification number: H01L27/228 ,  G11C11/16

Abstract: A ferromagnetic thin-film based digital memory having a substrate supporting bit structures that are electrically interconnected with information storage and retrieval circuitry and having first and second oppositely oriented relatively fixed magnetization layers and a ferromagnetic material film in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained. This ferromagnetic material film is separated from the first and second fixed magnetization films by corresponding layers of a nonmagnetic materials one being electrically insulative and that one remaining being electrically conductive. Each bit structure has an interconnection structure providing electrical contact thereto at a contact surface thereof substantially parallel to the intermediate layer positioned between the first contact surface and the substrate. A plurality of word line structures located across from a corresponding one of the bit structures on an opposite side. Electrical current selectively drawn through each of these bit structures and its interconnection structure can cause substantial heating of that bit structure to raise temperatures thereof while being above temperatures of at least an adjacent said bit structure because of sufficient thermal isolation.

Abstract translation: 一种基于铁磁薄膜的数字存储器，其具有支撑位结构的衬底，所述衬底支撑位结构，其与信息存储和检索电路电互连并且具有第一和第二相对定向的相对固定的磁化层和铁磁材料膜，其中特性磁性能基本上保持在低于 相关的临界温度，高于该临界温度，这种磁性不能保持。 该铁磁材料膜通过非磁性材料的相应层与第一和第二固定磁化膜分离，一个是电绝缘的，另一个是导电的。 每个位结构具有在其基本平行于位于第一接触表面和衬底之间的中间层的接触表面处提供与其接触的互连结构。 多个字线结构，位于相对侧上的相应一个位结构的两侧。 通过这些位结构中的每一个及其互连结构选择性地拉伸的电流可以导致该位结构的实质加热，以便由于足够的热隔离而在至少相邻的所述位结构的温度之上升高其温度。

公开(公告)号：US20060003471A1

公开(公告)日：2006-01-05

申请号：US11212646

申请日：2005-08-29

Applicant: James Deak

Inventor： James Deak

IPC: H01L21/00

CPC classification number: G11C11/16 ,  H01L27/222 ,  H01L43/08 ,  H01L43/12 ,  Y10T29/49021 ,  Y10T29/49044

Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.

Abstract translation: 本发明寻求通过使用在凹形写入导体内形成读取导体的工艺来减少写入操作所需的电流量，写入导体本身形成在绝缘层的沟槽内。 本发明通过隔离写入导体并且使得能够减少写入一位信息所需的电流来保护MTJ免受由写入导体产生的电压的影响。

公开(公告)号：US20050079638A1

公开(公告)日：2005-04-14

申请号：US10684967

申请日：2003-10-14

Applicant: Joel Drewes ,  James Deak

Inventor： Joel Drewes ,  James Deak

IPC: H01L21/00 ,  H01L27/22

CPC classification number: H01L27/222 ,  H01L43/08 ,  H01L43/12

Abstract: An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.

Abstract translation: MRAM器件包括具有由阻挡层隔开的上导电层和下导电层的磁存储单元的阵列。 为了减少跨越存储器单元的阻挡层的电短路的可能性，可以在上导电层周围形成间隔物，并且在已经蚀刻了磁存储单元的层之后，可以将存储单元氧化以转换任何导电颗粒 沿着存储器单元的侧壁沉积作为蚀刻工艺的副产物而形成非导电颗粒。 或者，下导电层可以重复进行部分氧化和部分蚀刻步骤，使得只有非导电颗粒可以作为蚀刻工艺的副产物沿着存储器单元的侧壁被抛出。

公开(公告)号：US20070161127A1

公开(公告)日：2007-07-12

申请号：US11657725

申请日：2007-01-25

Applicant: Hasan Nejad ,  James Deak

Inventor： Hasan Nejad ,  James Deak

IPC: H01L21/00

CPC classification number: H01L27/222 ,  H01L43/12

Abstract: The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.

Abstract translation: 本发明提供一种形成MRAM单元的方法，该方法在制造期间使电短路的发生最小化。 沟槽中的第一导体设置在绝缘层中，并且绝缘层和第一导体的上表面被平坦化。 然后，电介质层被沉积成稍大于稍后形成的感应层的期望最终厚度的厚度。 然后对电介质层进行图案化和蚀刻，以形成第一导体上的电池形状的开口。 然后，将坡莫合金电镀在电池形状中以形成感测层。 感应层和电介质层被平坦化，然后沉积非磁性隧道势垒层。 最后，在隧道势垒层上方形成钉扎层。

公开(公告)号：US20060192304A1

公开(公告)日：2006-08-31

申请号：US11415601

申请日：2006-05-01

Applicant: James Deak

Inventor： James Deak

IPC: H01L21/00

CPC classification number: B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/3272 ,  H01F41/304 ,  H01L43/12

Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.

公开(公告)号：US20050169046A1

公开(公告)日：2005-08-04

申请号：US11091258

申请日：2005-03-28

Applicant: James Deak

Inventor： James Deak

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/08 ,  G11C11/00

CPC classification number: H01L27/222 ,  G11C11/16 ,  H01L43/08

Abstract: A closed flux magnetic memory cell has a ferromagnetic pinned structure and a ferromagnetic free structure. Data is stored by controlling the relative magnetization between the pinned and free structures. The free structure is formed as a horizontally extending toroid, or tube, that is insulated from the pinned structure. A first conductive line passes through the center of the free structure while a second conductive line is connected to the pinned structure. A third conductive line can be formed through the free structure. This line is insulated from the toroid and the first conductor. The third conductive line can also be located outside the free structure. In operation of one embodiment, the first and third conductive lines are used to control the magnetized direction of the free structure. A resistance between the first and second conductive lines defines the data stored in the memory cell.