公开(公告)号：US09000852B1

公开(公告)日：2015-04-07

申请号：US13672338

申请日：2012-11-08

Applicant: Marvell International Ltd.

Inventor： Dennis Sinitsky ,  Junshi Qiao ,  Pei Wang ,  Song Chen ,  Haiqing Zhang ,  Tao Shui

IPC: H03B5/30 ,  H03B5/36 ,  H03L7/00

CPC classification number: H03L7/00 ,  H03B5/36 ,  H03B5/362 ,  H03B5/364 ,  H03B5/366 ,  H03B2201/0266 ,  H03B2201/0291 ,  H03L3/00

Abstract: Aspects of the disclosure provide a circuit. The circuit includes a signal amplifying circuit coupled with a crystal component of a natural frequency to form a crystal oscillator, and a signal generator circuit configured to generate a signal with an energy distribution about the natural frequency, and to provide the signal to the crystal oscillator to assist the crystal oscillator to begin oscillating.

Abstract translation: 本公开的方面提供电路。 该电路包括与固有频率的晶体分量耦合以形成晶体振荡器的信号放大电路，以及信号发生器电路，其被配置为产生具有关于固有频率的能量分布的信号，并将信号提供给晶体振荡器 以协助晶体振荡器开始振荡。

公开(公告)号：US09900018B1

公开(公告)日：2018-02-20

申请号：US15656458

申请日：2017-07-21

Applicant: Marvell International Ltd.

Inventor： Song Chen ,  Lei Luo ,  Tianfeng Ye ,  Ran Li

IPC: H03M1/06 ,  H03M1/08

CPC classification number: H03M1/08 ,  H03M1/0626 ,  H03M1/0863 ,  H03M1/12

Abstract: Embodiments described herein provide circuitry for reducing input distortion at a buffer due to large signal swings. The circuitry includes an analog-to-digital converter (ADC), a first buffer, a low pass filter, and a second buffer. The ADC is configured to convert an analog input to a digital output. The first buffer is coupled to an input node of the ADC and the low pass filter is coupled to an output of a driving circuit and an input to the first buffer. The second buffer placed in proximity to the first buffer. An input of the second buffer is connected to an output of the driving circuit and an output of the second buffer is connected to a feedback component of the driving circuit.

公开(公告)号：US08907833B1

公开(公告)日：2014-12-09

申请号：US13859008

申请日：2013-04-09

Applicant: Marvell International Ltd.

Inventor： Hao Zhou ,  Yonghua Song ,  Tao Shui ,  Jie Jiang ,  Song Chen

IPC: H03M1/38 ,  H03M1/12 ,  H03M1/00

CPC classification number: H03M1/002 ,  H03M1/1215 ,  H03M1/124 ,  H03M1/167

Abstract: In accordance with the teachings described herein, systems and methods are provided for a time-interleaved pipeline analog to digital converter. An example pipeline analog to digital converter may include passive sampling circuits and a multiplying digital to analog converter circuit. A first passive sampling circuit includes an input terminal coupled to an analog input signal, and outputs a first sample voltage that is responsive to the analog input signal. A second passive sampling circuit includes an input terminal coupled to the analog input signal, and outputs a second sample voltage that is responsive to the analog input signal. The first and second passive sampling circuits are clocked such that the first sample voltage and the second sample voltage are time-interleaved. A multiplying analog to digital converter (MDAC) circuit receives the time-interleaved first and second sample voltages from the first and second passive sampling circuits and processes the time-interleaved first and second sample voltages to generate a residue output voltage.

Abstract translation: 根据本文描述的教导，为时间交错流水线模数转换器提供了系统和方法。 示例性管线模数转换器可以包括无源采样电路和乘法数模转换器电路。 第一无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第一采样电压。 第二无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第二采样电压。 第一和第二无源采样电路被计时，使得第一采样电压和第二采样电压是时间交织的。 乘法模数转换器（MDAC）电路接收来自第一和第二无源采样电路的时间交错的第一和第二采样电压，并处理时间交错的第一和第二采样电压以产生残余输出电压。