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    Low power high speed pipeline ADC
    1.
    发明授权
    Low power high speed pipeline ADC 有权
    低功耗高速流水线ADC

    公开(公告)号：US08907833B1

    公开(公告)日：2014-12-09

    申请号：US13859008

    申请日：2013-04-09

    Applicant: Marvell International Ltd.

    Inventor： Hao Zhou ,  Yonghua Song ,  Tao Shui ,  Jie Jiang ,  Song Chen

    IPC: H03M1/38 ,  H03M1/12 ,  H03M1/00

    CPC classification number: H03M1/002 ,  H03M1/1215 ,  H03M1/124 ,  H03M1/167

    Abstract: In accordance with the teachings described herein, systems and methods are provided for a time-interleaved pipeline analog to digital converter. An example pipeline analog to digital converter may include passive sampling circuits and a multiplying digital to analog converter circuit. A first passive sampling circuit includes an input terminal coupled to an analog input signal, and outputs a first sample voltage that is responsive to the analog input signal. A second passive sampling circuit includes an input terminal coupled to the analog input signal, and outputs a second sample voltage that is responsive to the analog input signal. The first and second passive sampling circuits are clocked such that the first sample voltage and the second sample voltage are time-interleaved. A multiplying analog to digital converter (MDAC) circuit receives the time-interleaved first and second sample voltages from the first and second passive sampling circuits and processes the time-interleaved first and second sample voltages to generate a residue output voltage.

    Abstract translation: 根据本文描述的教导，为时间交错流水线模数转换器提供了系统和方法。 示例性管线模数转换器可以包括无源采样电路和乘法数模转换器电路。 第一无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第一采样电压。 第二无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第二采样电压。 第一和第二无源采样电路被计时，使得第一采样电压和第二采样电压是时间交织的。 乘法模数转换器（MDAC）电路接收来自第一和第二无源采样电路的时间交错的第一和第二采样电压，并处理时间交错的第一和第二采样电压以产生残余输出电压。

    Beta enhanced voltage reference circuit
    2.
    发明授权
    Beta enhanced voltage reference circuit 失效
    β增强型电压基准电路

    公开(公告)号：US08760220B1

    公开(公告)日：2014-06-24

    申请号：US13910718

    申请日：2013-06-05

    Applicant: Marvell International Ltd.

    Inventor： Hao Zhou ,  Bingkun Yao ,  Tao Shui ,  Yonghua Song

    IPC: G05F3/30

    CPC classification number: G05F3/30

    Abstract: A beta enhancement circuit includes a current source connected in series with a transistor between two voltage supply lines. In an embodiment, the voltage supply lines are configured for connection to a power source and ground potential. A resistor device is connected between a control terminal of the transistor device and one of voltage supply lines. A value for the resistor device is selected based on one or more process dependent parameters of the transistor.

    Abstract translation: β增强电路包括与两个电压线之间的晶体管串联连接的电流源。 在一个实施例中，电压供应线被配置为连接到电源和地电位。 电阻器件连接在晶体管器件的控制端子和电源线之一之间。 基于晶体管的一个或多个处理相关参数来选择电阻器件的值。

    Class-AB XTAL circuit
    3.
    发明授权
    Class-AB XTAL circuit 有权
    AB类XTAL电路

    公开(公告)号：US09252708B1

    公开(公告)日：2016-02-02

    申请号：US14257455

    申请日：2014-04-21

    Applicant: Marvell International Ltd.

    Inventor： Dennis Sinitsky ,  Junshi Qiao ,  Shafiq M. Jamal ,  Tao Shui

    IPC: H03B5/32 ,  H03B5/36

    CPC classification number: H03B5/364 ,  H03B5/36 ,  H03B5/362 ,  H03B2200/0012 ,  H03B2200/0062

    Abstract: A resonant element driver circuit includes a NMOS transistor and a PMOS transistor that are configured to drive a resonant element. The resonant element driver circuit includes biasing circuitry that is configured to bias the PMOS transistor. The biasing circuitry receives a reference signal that is used to set the biasing on the PMOS transistor. The resonant element driver further includes mirror circuitry that tracks current flowing through the NMOS and PMOS transistors.

    Abstract translation: 谐振元件驱动电路包括被配置为驱动谐振元件的NMOS晶体管和PMOS晶体管。 谐振元件驱动电路包括被配置为偏置PMOS晶体管的偏置电路。 偏置电路接收用于设置PMOS晶体管上的偏置的参考信号。 谐振元件驱动器还包括跟踪流过NMOS和PMOS晶体管的电流的反射镜电路。

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