公开(公告)号：US07700165B2

公开(公告)日：2010-04-20

申请号：US11627066

申请日：2007-01-25

申请人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

发明人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

IPC分类号： H05H1/24

CPC分类号： C23C16/24 ,  C23C16/45523 ,  C23C16/545 ,  Y02E10/545 ,  Y02E10/548

摘要： Provided is a deposited film containing microcrystalline silicon by plasma CVD, which includes changing at least one of conditions selected from a high frequency power density, a bias voltage with respect to an interelectrode distance, a bias current with respect to an electrode area, a high frequency power with respect to a source gas flow rate, a ratio of a diluting gas flow rate to a source gas flow rate, a substrate temperature, a pressure, and an interelectrode distance, between conditions for forming a deposited film of a microcrystalline region and conditions for forming a deposited film of an amorphous region; and forming a deposited film under conditions within a predetermined range in the vicinity of boundary conditions under which the crystal system of the deposited film substantially changes between a amorphous state and a microcrystalline state.

摘要翻译： 提供了通过等离子体CVD包含微晶硅的沉积膜，其包括改变选自高频功率密度，相对于电极间距离的偏置电压，相对于电极面积的偏置电流，高电平 用于形成微晶区域的沉积膜的条件和相对于源气体流量的稀释气体流量的比率，稀释气体流量与源气体流量的比率，基板温度，压力和电极间距离 形成非晶区沉积膜的条件; 以及在沉积膜的晶体系统在非晶态和微晶态之间基本上变化的边界条件附近的预定范围内的条件下形成沉积膜。

公开(公告)号：US5824566A

公开(公告)日：1998-10-20

申请号：US719409

申请日：1996-09-24

申请人： Masafumi Sano ,  Keishi Saito

发明人： Masafumi Sano ,  Keishi Saito

IPC分类号： H01L31/052 ,  H01L31/18 ,  H01L31/20 ,  H01L31/0216

CPC分类号： H01L31/206 ,  H01L31/056 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/52 ,  Y02P70/521

摘要： A method for producing a photo voltaic device, wherein the device comprises a base member including a substrate. A reflecting layer and a reflection enhancing layer are formed on the base member. A p-i-n structure formed of n-type, i-type and p-type semiconductor layers containing silicon atoms having a non-single crystal structure, is also formed on the base member at least once. The method comprises the steps of (a) depositing a material constituting the reflecting layer, at a substrate temperature of from 200.degree. to 500.degree. C. to form the reflecting layer; (b) thereafter lowering the substrate temperature to 100.degree. C. or below; and (c) thereafter depositing a material constituting the reflection enhancing layer on the reflecting layer at a substrate temperature of from 200.degree. to 400.degree. C., to form the reflection enhancing layer.

摘要翻译： 一种制造光伏器件的方法，其中所述器件包括包括衬底的基底构件。 反射层和反射增强层形成在基底构件上。 至少一次在基材上形成由含有非单晶结构的硅原子的n型，i型和p型半导体层构成的p-i-n结构。 该方法包括以下步骤：（a）在200℃至500℃的衬底温度下沉积构成反射层的材料以形成反射层; （b）此后将基板温度降至100℃或更低; （c）在200〜400℃的基板温度下，在反射层上沉积构成反射增强层的材料，形成反射增强层。

公开(公告)号：US5563075A

公开(公告)日：1996-10-08

申请号：US458098

申请日：1995-06-01

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

IPC分类号： H01L31/0392 ,  H01L31/052 ,  H01L31/065 ,  H01L31/075 ,  H01L31/18 ,  H01L31/20

CPC分类号： H01L31/065 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1884 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521 ,  Y10S136/293

摘要： A non-monocrystalline silicon semiconductor device having a pin junction is formed by forming a first doped semiconductor layer of a first conductivity disposed on a substrate. A first intrinsic layer is deposited on the first doped semiconductor layer employing RF energy. A second intrinsic layer is deposited on the first intrinsic layer employing microwave energy and RF energy simultaneously. A semiconductor precursor gas, including germanium and a semiconductor precursor gas including silicon are supplied to the second intrinsic layer during its formation. The content of the semiconductor precursor gas containing germanium is greater than the semiconductor gas including silicon in the layer thickness direction in the second intrinsic layer at a P-layer side. A second doped semiconductor layer is deposited on the second intrinsic layer.

摘要翻译： 具有pin结的非单晶硅半导体器件通过形成布置在衬底上的第一导电性的第一掺杂半导体层而形成。 使用RF能量将第一本征层沉积在第一掺杂半导体层上。 使用微波能量和RF能量同时沉积在第一本征层上的第二本征层。 包括锗和包含硅的半导体前体气体的半导体前体气体在其形成期间被提供给第二本征层。 包含锗的半导体前体气体的含量比在P层侧的第二本征层中的层厚度方向上包括硅的半导体气体的含量大。 第二掺杂半导体层沉积在第二本征层上。

公开(公告)号：US20070184191A1

公开(公告)日：2007-08-09

申请号：US11627066

申请日：2007-01-25

申请人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

发明人： Yasuyoshi Takai ,  Masafumi Sano ,  Keishi Saito

IPC分类号： C23C16/00

CPC分类号： C23C16/24 ,  C23C16/45523 ,  C23C16/545 ,  Y02E10/545 ,  Y02E10/548

摘要： Provided is a deposited film containing microcrystalline silicon by plasma CVD, which includes changing at least one of conditions selected from a high frequency power density, a bias voltage with respect to an interelectrode distance, a bias current with respect to an electrode area, a high frequency power with respect to a source gas flow rate, a ratio of a diluting gas flow rate to a source gas flow rate, a substrate temperature, a pressure, and an interelectrode distance, between conditions for forming a deposited film of a microcrystalline region and conditions for forming a deposited film of an amorphous region; and forming a deposited film under conditions within a predetermined range in the vicinity of boundary conditions under which the crystal system of the deposited film substantially changes between a amorphous state and a microcrystalline state.

摘要翻译： 提供了通过等离子体CVD包含微晶硅的沉积膜，其包括改变选自高频功率密度，相对于电极间距离的偏置电压，相对于电极面积的偏置电流，高电平 用于形成微晶区域的沉积膜的条件和相对于源气体流量的稀释气体流量的比率，稀释气体流量与源气体流量的比率，基板温度，压力和电极间距离 形成非晶区沉积膜的条件; 以及在沉积膜的晶体系统在非晶态和微晶态之间基本上变化的边界条件附近的预定范围内的条件下形成沉积膜。

公开(公告)号：US07001460B2

公开(公告)日：2006-02-21

申请号：US10625672

申请日：2003-07-24

申请人： Keishi Saito ,  Masafumi Sano

发明人： Keishi Saito ,  Masafumi Sano

IPC分类号： C30B25/14

CPC分类号： H01L31/076 ,  H01L31/03685 ,  H01L31/03687 ,  H01L31/056 ,  H01L31/206 ,  Y02E10/52 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

摘要： In a semiconductor element comprising microcrystalline semiconductor, a semiconductor junction is provided within a microcrystal grain. Further, in a semiconductor element comprising microcrystalline semiconductor, microcrystal grains of different grain diameters are provided as a mixture to form a semiconductor layer. Thereby, discontinuity of a semiconductor junction is lessened to thereby improve the characteristics, durability, and heat resisting properties of a semiconductor element. Distortion in a semiconductor layer is also reduced.

摘要翻译： 在包含微晶半导体的半导体元件中，在微晶晶粒内提供半导体结。 此外，在包含微晶半导体的半导体元件中，作为混合物提供不同晶粒直径的微晶粒以形成半导体层。 因此，半导体结的不连续性减小，从而提高半导体元件的特性，耐久性和耐热性。 半导体层的失真也减少了。

公开(公告)号：US20050173704A1

公开(公告)日：2005-08-11

申请号：US10625672

申请日：2003-07-24

申请人： Keishi Saito ,  Masafumi Sano

发明人： Keishi Saito ,  Masafumi Sano

IPC分类号： H01L31/0368 ,  H01L31/052 ,  H01L31/076 ,  H01L31/20 ,  H01L29/04

CPC分类号： H01L31/076 ,  H01L31/03685 ,  H01L31/03687 ,  H01L31/056 ,  H01L31/206 ,  Y02E10/52 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

摘要： In a semiconductor element comprising microcrystalline semiconductor, a semiconductor junction is provided within a microcrystal grain. Further, in a semiconductor element comprising microcrystalline semiconductor, providing microcrystal grains of different grain diameters as a mixture to form a semiconductor layer. Thereby, discontinuity of a semiconductor junction is improved to improve the characteristics, durability, and heat resisting properties of a semiconductor element. Distortion in a semiconductor layer is also reduced.

摘要翻译： 在包含微晶半导体的半导体元件中，在微晶晶粒内提供半导体结。 此外，在包含微晶半导体的半导体元件中，提供作为混合物的不同粒径的微晶粒以形成半导体层。 因此，提高了半导体结的不连续性以改善半导体元件的特性，耐久性和耐热性能。 半导体层的失真也减少了。

公开(公告)号：US5429685A

公开(公告)日：1995-07-04

申请号：US150813

申请日：1993-11-12

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

IPC分类号： H01L31/0392 ,  H01L31/052 ,  H01L31/065 ,  H01L31/075 ,  H01L31/18 ,  H01L31/20 ,  H01L31/0376 ,  H01L31/0384

CPC分类号： H01L31/065 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1884 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521 ,  Y10S136/293

摘要： The present invention provides a photovoltaic element in which the open-circuit voltage and the path length of holes are improved by preventing the recombination of photoexcited carriers.The p-i-n junction type photovoltaic element is composed of a p-type layer, an i-type layer of a laminated structure consisting of an i-type layer formed by RF plasma CVD on the p-type layer side and an i-type layer formed by microwave (.mu.W) CVD on the n-type layer side, or an i-type layer formed by microwave (.mu.W) plasma CVD on the p-type layer side and an i-type layer formed by RF plasma CVD on the n-type layer side, characterized in that the i-type layer formed by .mu.W plasma CVD is formed by a process in which a lower .mu.W energy and a higher RF energy than the .mu.W energy needed to decompose 100% of the source gas are simultaneously applied to a source gas containing Si and Ge at a pressure of 50 mTorr or less, such that the minimum value of the bandgap is shifted toward the p-type layer side, away from the center of the i-type layer, and the i-type layer formed by RF plasma CVD is formed 30 nm thick or less by using a source gas containing a silicon-containing gas at a deposition rate of 2 nm/sec or less.

摘要翻译： 本发明提供一种光电元件，其中通过防止光激发载流子的复合，提高了开路电压和空穴的路径长度。 pin结型光电元件由p型层，由p型层侧的RF等离子体CVD形成的i型层构成的层叠结构的i型层和形成为i型层的i型层构成 通过在n型层侧的微波（μW）CVD或在p型层侧由微波（μW）等离子体CVD形成的i型层和通过RF等离子体CVD形成的i型层 n型层侧，其特征在于，通过以下步骤形成由μW等离子体CVD形成的i型层，其中相比于分解100％的源所需的μW能量较低的μW能量和较高的RF能量 在50mTorr以下的压力下将气体同时施加到含有Si和Ge的源气体，使得带隙的最小值朝着p型层侧偏离i型层的中心， 通过使用含有含硅气体的源气体，通过RF等离子体CVD形成的i型层形成为30nm以下 速度为2nm / sec以下。

公开(公告)号：US06635899B2

公开(公告)日：2003-10-21

申请号：US09839891

申请日：2001-04-23

申请人： Keishi Saito ,  Masafumi Sano

发明人： Keishi Saito ,  Masafumi Sano

IPC分类号： H01L2904

CPC分类号： H01L31/076 ,  H01L31/03685 ,  H01L31/03687 ,  H01L31/056 ,  H01L31/206 ,  Y02E10/52 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

摘要： In a semiconductor element comprising microcrystalline semiconductor, a semiconductor junction is provided within a microcrystal grain. Further, in a semiconductor element comprising microcrystalline semiconductor, providing microcrystal grains of different grain diameters as a mixture to form a semiconductor layer. Thereby, discontinuity of a semiconductor junction is improved to improve the characteristics, durability, and heat resisting properties of a semiconductor element. Distortion in a semiconductor layer is also reduced.

摘要翻译： 在包含微晶半导体的半导体元件中，在微晶晶粒内提供半导体结。 此外，在包含微晶半导体的半导体元件中，提供作为混合物的不同粒径的微晶粒以形成半导体层。 因此，提高了半导体结的不连续性以改善半导体元件的特性，耐久性和耐热性能。 半导体层的失真也减少了。

公开(公告)号：US5563425A

公开(公告)日：1996-10-08

申请号：US149749

申请日：1993-11-10

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

IPC分类号： H01L31/04 ,  H01L31/052 ,  H01L31/075 ,  H01L31/20 ,  H01L29/04 ,  H01L31/36 ,  H01L31/376

CPC分类号： H01L31/065 ,  H01L31/056 ,  H01L31/075 ,  H01L31/204 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521

摘要： An object of the present invention is to provide a photoelectrical conversion device in which recombination of carriers excited by light is prevented and the open voltage and the carrier range of positive holes are improved and to provide a generating system using the photoelectrical conversion device. The photoelectrical conversion device includes a p-layer, an i-layer, and an n-layer, wherein the photoelectrical conversion device being formed by stacking the p-layer, the i-layer and the n-layer each of which is made of non-single-crystal silicon semiconductor, the i-layer contains germanium atoms, the band gap of the i-layer is smoothly changed in a direction of the thickness of the i-layer, the minimum value of the band gap is positioned adjacent to the p-layer from the central position of the i-layer and both of a valence control agent to serve as a donor and another valence control agent to serve as an acceptor are doped into the i-layer. Further, at least either of the p-layer or the n-layer is formed into a stacked structure consisting of a layer mainly composed of group III elements of the periodic table and/or group V elements of the same and a layer containing the valence control agent and mainly composed of silicon atoms.

摘要翻译： 本发明的目的是提供一种光电转换装置，其中防止由光激发的载流子的复合，并且改善了空穴的开路电压和载流子范围，并提供了使用光电转换装置的发电系统。 所述光电转换装置包括p层，i层和n层，其中所述光电转换装置通过层叠p层，i层和n层而形成，所述p层，i层和n层由 非单晶硅半导体，i层含有锗原子，i层的带隙在i层的厚度方向上平滑地变化，带隙的最小值位于 i层的中心位置的p层和作为供体的价电子控制剂以及用作受体的另一价电子控制剂都掺杂到i层中。 此外，p层或n层中的至少任一层形成为由主要由周期表的III族元素和/或其V族元素组成的层和包含该价电子层的层 控制剂主要由硅原子组成。

公开(公告)号：US06379994B1

公开(公告)日：2002-04-30

申请号：US08719259

申请日：1996-09-24

申请人： Masafumi Sano ,  Keishi Saito

发明人： Masafumi Sano ,  Keishi Saito

IPC分类号： H01L2100

CPC分类号： H01L31/1876 ,  H01L31/182 ,  H01L31/202 ,  H01L31/208 ,  Y02E10/546 ,  Y02P70/521

摘要： Disclosed is a method for manufacturing a photovoltaic element wherein a pin-structure formed by laminating n-, i- and p-type semiconductor layers, each of which contains silicon atoms and has a non-monocrystalline crystal structure is formed at least one or more times on a substrate, the method comprising steps of forming each of the semiconductor layers and annealing the surface of at least one of the semiconductor layers or the substrate in an atmosphere of hydrogen gas, helium gas or argon gas that contains 1 to 1000 ppm of oxygen atom containing gas.

摘要翻译： 公开了一种光电元件的制造方法，其特征在于，通过层叠n，i，p型半导体层，其中含有硅原子并具有非单晶晶体结构的pin结构形成至少一个以上 时间，该方法包括以下步骤：在氢气，氦气或氩气的气氛中形成每个半导体层并退火至少一个半导体层或衬底的表面，所述氢气，氦气或氩气含有1至1000ppm 含氧原子的气体。