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    Packet switch communication network using packet having virtual channel identifier
    5.
    发明授权
    Packet switch communication network using packet having virtual channel identifier 失效
    使用虚拟通道识别器的分组的分组交换机通信网络

    公开(公告)号：US5119369A

    公开(公告)日：1992-06-02

    申请号：US547216

    申请日：1990-07-03

    申请人： Shirou Tanabe ,  Kenji Kawakita ,  Shinobu Gohara

    发明人： Shirou Tanabe ,  Kenji Kawakita ,  Shinobu Gohara

    IPC分类号： H04L12/70

    CPC分类号： H04L49/3009 ,  H04L49/254 ,  H04L49/30

    摘要： In a packet network which includes a plurality of packet switching stations and in which a packet including in its header portion a VPI (Virtual Path Indentifier) for identifying one of logical paths multipliexed on a transmission line and a VCI (Virtual Connection Identifier) for identifying one of logical connections multiplexed on one logical path is communicated between the switching stations, each switching station preliminarily designates a VCI to be given to a packet directed to that station when a logical connection is to be set up between that station and another station. When receiving an information packet from the other station, the each station makes access to header label conversion tables on the basis of a VCI included in the received packet to read internal routing information necessary for a packet switching operation and a VCI to be given to a packet to be delivered.

    Communication System Using Passive Optical Network and Passive Optical Network
    6.
    发明申请
    Communication System Using Passive Optical Network and Passive Optical Network 有权
    使用无源光网络和被动光网络的通信系统

    公开(公告)号：US20090232498A1

    公开(公告)日：2009-09-17

    申请号：US12405455

    申请日：2009-03-17

    申请人： Munetoshi Tsuge ,  Takashi Mori ,  Masanobu Kobayashi ,  Yoshio Miyamori ,  Shinobu Gohara

    发明人： Munetoshi Tsuge ,  Takashi Mori ,  Masanobu Kobayashi ,  Yoshio Miyamori ,  Shinobu Gohara

    IPC分类号： H04J14/00

    CPC分类号： H04L41/0226 ,  H04J3/0667 ,  H04L41/0213 ,  H04L41/0896 ,  H04Q11/0067 ,  H04Q2011/0079 ,  H04Q2011/0088

    摘要： An OLT transmits and receives a CMTS/CM apparatus control signal through an apparatus physical management interface which is physically identical to or different fro a main signal interface (NNI) and processes the CMTS apparatus control signal by itself. When connection of a new ONU is detected by an ONU apparatus control signal, an IP address is allocated by using the CM apparatus control signal in a manner similar to the CM. The CM apparatus control signal regarding the ONU is transmitted and received by using the IP address and a mutual conversion is performed between the CM apparatus control signal and the ONU apparatus control signal. The ONU processes the ONU apparatus control signal in a manner similar to the ONU based on an ordinary PON standard.

    摘要翻译： OLT通过物理上与主信号接口（NNI）相同或不同的装置物理管理接口发送和接收CMTS / CM设备控制信号，并且自己处理CMTS设备控制信号。 当通过ONU装置控制信号检测到新ONU的连接时，以类似于CM的方式使用CM设备控制信号分配IP地址。 通过使用IP地址发送和接收关于ONU的CM设备控制信号，并且在CM设备控制信号和ONU设备控制信号之间进行相互转换。 ONU以与普通PON标准相似的方式处理ONU装置控制信号。

    ATM cell switching system
    7.
    发明授权
    ATM cell switching system 失效
    ATM信元交换系统

    公开(公告)号：US06728242B2

    公开(公告)日：2004-04-27

    申请号：US10374998

    申请日：2003-02-28

    申请人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

    发明人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

    IPC分类号： H04L1256

    CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04L2012/5627 ,  H04L2012/5631 ,  H04L2012/5638 ,  H04L2012/5649 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/568 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

    摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

    摘要翻译： ATM交换系统包括具有多个输入端口和具有相同信元传输速率的多个输出端口的开关单元，以及多路复用器，用于将从至少两个输出端口输出的单元列复用为单个单元列，并输出该单元 训练到高速输出线（和/或解复用器，用于从输出端口多路复用到多个单元列，并将单元列输出到多个低速输出线）。 开关单元包括缓冲存储器，用于临时存储从输入端口输入的单元，同时形成用于每个单元将被输出到的每个输出线的队列链;解复用器，用于将从缓冲存储器读取的单元在输出端口之中分配 以及缓冲存储器控制电路，用于通过共享缓冲存储器来控制单元的写入和读取操作。 缓冲存储器控制电路具有用于输出要从共享缓冲存储器读取的单元被输出的输出行的标识符的控制表装置，并且从由控制器输出的输出行标识符指定的链中读取单元 表装置。

    Packet communication method and packet communication apparatus
    10.
    发明授权
    Packet communication method and packet communication apparatus 失效
    分组通信方法和分组通信装置

    公开(公告)号：US5467346A

    公开(公告)日：1995-11-14

    申请号：US266636

    申请日：1994-06-28

    申请人： Yutaka Ito ,  Makoto Mori ,  Shinobu Gohara

    发明人： Yutaka Ito ,  Makoto Mori ,  Shinobu Gohara

    IPC分类号： H04L12/70 ,  H04L12/803 ,  H04L12/891 ,  H04Q11/04

    CPC分类号： H04L49/3081 ,  H04Q11/0478 ,  H04L2012/5612 ,  H04L2012/5613 ,  H04L2012/5615 ,  H04L2012/5672

    摘要： In communication nodes inserted in a ring-shaped or bus-shaped transmission path, a transmitting section writes transmission packets into transmission buffers in a predetermined order and sends out the transmission packets in the predetermined order onto the transmission path at appropriate unoccupied time of the transmission path, whereas a receiving section temporarily stores packets directed to its own node into a receiving buffer and reads out the packets in the same order as that of writing them into the transmission buffers in the transmitting section.

    摘要翻译： 在插入环形或总线形传输路径的通信节点中，发送部分以预定的顺序将传输分组写入传输缓冲器，并在传输的适当的未占用时间以预定顺序发送传输分组到传输路径上 而接收部分将指向其自己的节点的分组临时存储到接收缓冲器中，并以与将它们写入发送部分中的传输缓冲器的顺序相同的顺序读出分组。