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    A/D CONVERSION DEVICE
    3.
    发明申请
    A/D CONVERSION DEVICE 有权
    A / D转换器件

    公开(公告)号：US20130127650A1

    公开(公告)日：2013-05-23

    申请号：US13814205

    申请日：2012-03-21

    申请人： Taiji Akizuki ,  Suguru Fujita

    发明人： Taiji Akizuki ,  Suguru Fujita

    IPC分类号： H03M1/20

    CPC分类号： H03M1/20 ,  H03M1/201

    摘要： An A/D conversion device has means for generating a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal; means for generating a shift voltage which varies every cycle of the reference clock signal while the cycle of the control clock signal is taken as one cycle, means for offsetting an analog signal by the shift voltage, means for A/D converting the offset analog signal every cycle of the reference clock signal signal, and means for averaging outputs from the A/D converter every cycle of the control clock signal.

    摘要翻译： A / D转换装置具有用于产生具有作为参考时钟信号的周期的整数倍的周期的控制时钟信号的装置; 用于产生在控制时钟信号的周期作为一个周期的基准时钟信号的每个周期变化的移位电压的装置，用于通过移位电压偏移模拟信号的装置，用于对偏移模拟信号进行A / D转换的装置 参考时钟信号信号的每个周期，以及用于对来自A / D转换器的每个周期的控制时钟信号的输出进行平均的装置。

    A/D conversion device
    4.
    发明授权
    A/D conversion device 有权
    A / D转换装置

    公开(公告)号：US08836564B2

    公开(公告)日：2014-09-16

    申请号：US13814205

    申请日：2012-03-21

    申请人： Taiji Akizuki ,  Suguru Fujita

    发明人： Taiji Akizuki ,  Suguru Fujita

    IPC分类号： H03M1/12 ,  H03M1/20

    CPC分类号： H03M1/20 ,  H03M1/201

    摘要： An A/D conversion device generates a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal. A shift voltage is generated which varies every cycle of the reference clock signal while the cycle of the control clock signal is taken as one cycle. An analog signal is offset by the shift voltage. The offset analog signal is converted to a digital signal every cycle of the reference clock signal. Outputs from the A/D converter are averaged every cycle of the control clock signal.

    摘要翻译： A / D转换装置产生具有作为参考时钟信号的周期的整数倍的周期的控制时钟信号。 产生一个转换电压，当控制时钟信号的周期作为一个周期时，基准时钟信号的每个周期都会改变。 模拟信号被移位电压偏移。 偏移模拟信号在参考时钟信号的每个周期被转换成数字信号。 来自A / D转换器的输出在控制时钟信号的每个周期进行平均。

    WIRELESS COMMUNICATION METHOD, RADIO TRANSMITTER APPARATUS AND RADIO RECEIVER APPARATUS
    5.
    发明申请
    WIRELESS COMMUNICATION METHOD, RADIO TRANSMITTER APPARATUS AND RADIO RECEIVER APPARATUS 审中-公开
    无线通信方法，无线发射机设备和无线接收设备

    公开(公告)号：US20100266053A1

    公开(公告)日：2010-10-21

    申请号：US12742061

    申请日：2008-11-27

    申请人： Takenori Sakamoto ,  Taisuke Matsumoto ,  Satoshi Hasako ,  Suguru Fujita ,  Masashi Kobayashi ,  Zhan Yu

    发明人： Takenori Sakamoto ,  Taisuke Matsumoto ,  Satoshi Hasako ,  Suguru Fujita ,  Masashi Kobayashi ,  Zhan Yu

    IPC分类号： H04L27/00 ,  H04L27/20 ,  H04L27/06

    CPC分类号： H04L25/0224 ,  H04L27/0008 ,  H04L27/18 ,  H04L27/2071

    摘要： A wireless communication method, a radio transmitter apparatus and a radio receiver apparatus wherein a signal sequence, which is used in a reception process using a first modulation scheme and can be generated from a signal sequence prepared for a reception process and used in a second modulation scheme, is employed, thereby achieving a performance to a similar extent to the reception process performance using the second modulation scheme. A radio transmitter apparatus (20) uses a first modulation scheme (e.g., OOK modulation scheme) to sequentially transmit, as a first sequence, both a sub-sequence a1(n), which is identical with a second sequence a(n) designed for use in a second modulation scheme (e.g., BPSK modulation scheme), and a sub-sequence a2(n), the bits of which are reverse to those of the second sequence a(n), in a time division manner. A radio receiver apparatus (30) detects the sub-sequence a1(n) and sub-sequence a2(n) in a received signal to send the detection result to the following stage for a signal processing.

    摘要翻译： 一种无线通信方法，无线发送装置以及无线接收装置，其特征在于，在使用第一调制方式的接收处理中使用的信号序列，可以从为接收处理而准备的信号序列生成并在第二调制中使用的信号序列 方案，从而实现与使用第二调制方案的接收处理性能相似程度的性能。 无线电发射机装置（20）使用第一调制方案（例如，OOK调制方案）作为第一序列顺序地发送与被设计的第二序列a（n）相同的子序列a1（n） 用于第二调制方案（例如，BPSK调制方案）以及子序列a2（n），它们的比特以时分方式与第二序列a（n）的比特相反。 无线接收装置（30）检测接收信号中的子序列a1（n）和子序列a2（n），将检测结果发送到后续的信号处理阶段。

    HIGH-FREQUENCY MODULE AND METHOD FOR INSPECTING HIGH-FREQUENCY MODULE
    7.
    发明申请
    HIGH-FREQUENCY MODULE AND METHOD FOR INSPECTING HIGH-FREQUENCY MODULE 审中-公开
    高频模块和检测高频模块的方法

    公开(公告)号：US20140159766A1

    公开(公告)日：2014-06-12

    申请号：US14130654

    申请日：2012-08-22

    申请人： Suguru Fujita ,  Ryosuke Shiozaki

    发明人： Suguru Fujita ,  Ryosuke Shiozaki

    IPC分类号： G01R31/26 ,  H01L23/66

    CPC分类号： G01R31/2601 ,  G01R31/046 ,  G01R31/2822 ,  G01R31/2884 ,  H01L22/14 ,  H01L22/34 ,  H01L23/645 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13005 ,  H01L2224/16238 ,  H01L2224/81121 ,  H01L2224/81908 ,  H01L2924/206

    摘要： A high-frequency module includes a high-frequency circuit chip, a wiring board having a wiring unit including connection pads which are flip-chip-connected to input and output terminals of the high-frequency circuit chip via bumps, a measurement circuit element that is disposed on a surface, opposed to the wiring board, of the high-frequency circuit chip and is connected between at least two terminals, connected to connection pads of the wiring unit, of the input and output terminals, or that is disposed on a surface, opposed to the high-frequency circuit chip, of the wiring board and is connected to the connection pads, and a detection conductor that is disposed on the high-frequency circuit chip or the wiring board at such a position as to be opposed to the measurement circuit element.

    摘要翻译： 高频模块包括高频电路芯片，布线板，具有布线单元，该布线单元包括通过凸块倒装芯片连接到高频电路芯片的输入和输出端子的连接焊盘;测量电路元件， 设置在与高频电路芯片的布线板相对的表面上，并且连接到连接到布线单元的连接焊盘的输入和输出端子的至少两个端子，或者被布置在 与布线基板相对的高频电路芯片的表面连接到连接焊盘，以及检测导体，其设置在与高频电路芯片或布线基板相对的位置上 测量电路元件。

    Modulating circuit, transmitting apparatus using the same, receiving apparatus and communication system
    9.
    发明授权
    Modulating circuit, transmitting apparatus using the same, receiving apparatus and communication system 有权
    调制电路，使用该调制电路的发送装置，接收装置和通信系统

    公开(公告)号：US07940841B2

    公开(公告)日：2011-05-10

    申请号：US11718570

    申请日：2005-11-04

    申请人： Masahiro Mimura ,  Kazuaki Takahashi ,  Suguru Fujita ,  Yoshinori Kunieda ,  Noriyuki Ueki

    发明人： Masahiro Mimura ,  Kazuaki Takahashi ,  Suguru Fujita ,  Yoshinori Kunieda ,  Noriyuki Ueki

    IPC分类号： H03K7/04

    CPC分类号： H04B1/7174 ,  H03K7/04 ,  H04B1/71635 ,  H04B1/71637 ,  H04B1/7176 ,  H04L25/4902 ,  H04L27/0004

    摘要： A communication system includes a modulating circuit to increase the amount of information to be transmitted, a transmitting apparatus capable of easily generating a desired waveform even for any very short wavelets, a receiving apparatus capable of easily separating wavelets even if the intervals thereof are narrow. The modulating circuit includes clock generating, transmission signal generating, control signal generating, delay and wavelet generating parts. The clock generating part generates a clock signal at predetermined time interval “Tp”. The transmission signal generating part generates a transmission signal at interval “Tp”. The control signal generating part outputs a control signal of a predetermined duration based on the clock signal. The delay part generates the control signal as a delay signal that has been delayed by a delay amount based on the transmission signal. The wavelet generating part generates a wavelet at the generation timing of the delay signal.

    摘要翻译： 一种通信系统包括：调制电路，用于增加要发送的信息量;即使对于任何非常短的小波也能够容易地产生期望的波形的发送装置，即使其间隔窄也能够容易地分离小波的接收装置。 调制电路包括时钟产生，发送信号产生，控制信号产生，延迟和小波发生部分。 时钟产生部分以预定时间间隔“Tp”产生时钟信号。 发送信号生成部以间隔“Tp”生成发送信号。 控制信号产生部分基于时钟信号输出预定持续时间的控制信号。 延迟部分产生作为延迟信号的控制信号，该延迟信号已经基于发送信号被延迟延迟量。 小波生成部在延迟信号的产生定时产生小波。

    Pulse generation circuit and modulator
    10.
    发明授权
    Pulse generation circuit and modulator 有权
    脉冲发生电路和调制器

    公开(公告)号：US07898354B2

    公开(公告)日：2011-03-01

    申请号：US12305546

    申请日：2007-06-20

    申请人： Shigeru Kobayashi ,  Michiaki Matsuo ,  Suguru Fujita

    发明人： Shigeru Kobayashi ,  Michiaki Matsuo ,  Suguru Fujita

    IPC分类号： H03K7/02

    CPC分类号： H03C1/36 ,  H03K7/08

    摘要： It is an object of the invention to provide a pulse generation circuit and a modulator for realizing a high On/Off ratio in a small circuit scale and with lower power consumption. A short pulse generation circuit according to the invention includes an oscillator 101, a control signal generation circuit 102, an intermittent frequency multiplier 103, a filter 104, and an output terminal 105. The oscillator 101 and the intermittent frequency multiplier 103 are active circuits implemented as active elements. A continuous signal is output from the oscillator 101 and is input to the intermittent frequency multiplier 103 and the intermittent frequency multiplier 103 intermittently operates according to a control signal output from the control signal generation circuit 102, thereby generating a short pulse signal, and a spurious component is removed through the filter.

    摘要翻译： 本发明的目的是提供一种用于在小电路规模和低功耗下实现高开/关比的脉冲发生电路和调制器。 根据本发明的短脉冲发生电路包括振荡器101，控制信号产生电路102，间歇倍频器103，滤波器104和输出端子105.振荡器101和间歇倍频器103是实现的有源电路 作为活动元素。 从振荡器101输出连续信号，并输入到间歇倍频器103，并且间歇频率乘法器103根据从控制信号发生电路102输出的控制信号间歇地工作，从而产生短脉冲信号和假 组件通过过滤器被去除。