利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

105 条记录 (耗时 0.026 秒)

    Self assembly of conducting polymer for formation of polymer memory cell
    2.
    发明授权
    Self assembly of conducting polymer for formation of polymer memory cell 有权
    用于形成聚合物记忆体的导电聚合物的自组装

    公开(公告)号：US06852586B1

    公开(公告)日：2005-02-08

    申请号：US10677042

    申请日：2003-10-01

    申请人： Matthew S. Buynoski ,  Suzette K. Pangrle ,  Uzodinma Okoroanyanwu ,  Nicholas H. Tripsas

    发明人： Matthew S. Buynoski ,  Suzette K. Pangrle ,  Uzodinma Okoroanyanwu ,  Nicholas H. Tripsas

    IPC分类号： G11C13/02 ,  H01L27/28 ,  H01L51/40 ,  H01L21/8234

    CPC分类号： G11C13/0069 ,  B82Y10/00 ,  G11C13/0009 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2013/009 ,  G11C2213/56 ,  G11C2213/71 ,  H01L27/28 ,  H01L51/0012

    摘要： The present invention provides a selectively conductive organic semiconductor (e.g., polymer) device that can be utilized as a memory cell. A polymer solution including a conducting polymer self assembles relative to a conductive electrode. The process affords self-assembly such that a shortest conductive path can be achieved. The method includes depositing a concentrated solution of conducting polymer on a conductive surface, applying heat and optionally a vacuum, and permitting the conducting polymer to self-assemble into an organic semiconductor. The organic semiconductor can be employed within single and multi-cell memory devices by forming a structure with two or more electrodes while employing the organic semiconductor along with a passive device between the electrodes. A partitioning component can be integrated with the memory device to facilitate programming and stacking of additional memory cells on top of or in association with previously formed cells.

    摘要翻译： 本发明提供可用作存储单元的选择性导电的有机半导体（例如，聚合物）器件。 包括导电聚合物的聚合物溶液相对于导电电极自组装。 该过程提供自组装，使得可以实现最短的导电路径。 该方法包括将导电聚合物的浓缩溶液沉积在导电表面上，施加热量和任选的真空，并允许导电聚合物自组装成有机半导体。 有机半导体可以在单电池和多电池存储器件中使用，通过形成具有两个或多个电极的结构，同时在电极之间使用有机半导体以及无源器件。 分区组件可以与存储器件集成，以便于在先前形成的单元之上或与之前相关联的附加存储器单元的编程和堆叠。

    Planar polymer memory device
    4.
    发明授权
    Planar polymer memory device 有权
    平面聚合物记忆装置

    公开(公告)号：US06977389B2

    公开(公告)日：2005-12-20

    申请号：US10452877

    申请日：2003-06-02

    申请人： Nicholas H. Tripsas ,  Matthew S. Buynoski ,  Uzodinma Okoroanyanwu ,  Suzette K. Pangrle

    发明人： Nicholas H. Tripsas ,  Matthew S. Buynoski ,  Uzodinma Okoroanyanwu ,  Suzette K. Pangrle

    IPC分类号： G11C11/56 ,  G11C13/02 ,  H01L27/115 ,  H01L27/24 ,  H01L27/28 ,  H01L35/24

    CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C11/5664 ,  G11C13/0016 ,  H01L27/28 ,  H01L51/0575

    摘要： The present invention provides a planar polymer memory device that can operate as a non-volatile memory device. A planar polymer memory device can be formed with two or more electrodes and an electrode extension associated with one electrode, wherein a selectively conductive medium and dielectric separate the electrodes. The method for forming a planar polymer memory device comprises at least one of forming a first electrode with an associated plug, forming a second electrode, forming a passive layer over the extension, depositing an organic polymer and patterning the organic polymer. The method affords integration of a planar polymer memory device into a semiconductor fabrication process. A thin film diode (TFD) can further be employed with a planar polymer memory device to facilitate programming. The TFD can be formed between the first electrode and the selectively conductive medium or the second electrode and the selectively conductive medium.

    摘要翻译： 本发明提供一种能够作为非易失性存储器件操作的平面聚合物存储器件。 平面聚合物存储器件可以形成有两个或更多个电极和与一个电极相关联的电极延伸，其中选择性导电的介质和电介质分离电极。 用于形成平面聚合物记忆装置的方法包括以下步骤中的至少一种：形成具有相关塞子的第一电极，形成第二电极，在延伸部分上形成钝化层，沉积有机聚合物和图案化有机聚合物。 该方法将平面聚合物存储器件集成到半导体制造工艺中。 还可以使用薄膜二极管（TFD）与平面聚合物存储器件来促进编程。 可以在第一电极和选择性导电介质或第二电极和选择性导电介质之间形成TFD。

    Method(s) facilitating formation of memory cell(s) and patterned conductive
    5.
    发明授权
    Method(s) facilitating formation of memory cell(s) and patterned conductive 失效
    促进形成记忆体和图案化的导电聚合物膜的方法

    公开(公告)号：US06753247B1

    公开(公告)日：2004-06-22

    申请号：US10285183

    申请日：2002-10-31

    申请人： Uzodinma Okoroanyanwu ,  Suzette K. Pangrle ,  Matthew S. Buynoski ,  Nicholas H. Tripsas ,  Mark S. Chang ,  Ramkumar Subramanian ,  Angela T. Hui

    发明人： Uzodinma Okoroanyanwu ,  Suzette K. Pangrle ,  Matthew S. Buynoski ,  Nicholas H. Tripsas ,  Mark S. Chang ,  Ramkumar Subramanian ,  Angela T. Hui

    IPC分类号： H01L214763

    CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C13/0016 ,  H01L27/285

    摘要： A methodology for forming a memory cell is disclosed, wherein an organic polymer layer is formed over a conductive layer and an electrode layer is formed over the organic polymer layer. A first via is etched into the electrode and organic polymer layers, and a dielectric material is applied over the stack to at least fill in the first via. A second via is then etched into the dielectric material so as to expose and make the electrode layer available as a top electrode. A wordline is then formed over the dielectric material such that the top electrode is connected to the wordline by way of the second via. A memory device formed in accordance with the disclosed methodology includes a top electrode formed over an organic polymer layer, a conductive layer under the organic polymer layer, a via defined by a dielectric material and located above the top electrode, and a wordline formed over the dielectric material such that the top electrode is connected to the wordline by way of the via.

    摘要翻译： 公开了一种用于形成存储单元的方法，其中在导电层上形成有机聚合物层，并且在有机聚合物层上形成电极层。 将第一通孔蚀刻到电极和有机聚合物层中，并且将电介质材料施加到堆叠上以至少填充在第一通孔中。 然后将第二通道蚀刻到电介质材料中，以暴露并使电极层可用作顶部电极。 然后在电介质材料上形成字线，使得顶部电极通过第二通孔连接到字线。 根据所公开的方法形成的存储器件包括形成在有机聚合物层上的顶部电极，有机聚合物层下面的导电层，由电介质材料限定并位于顶部电极之上的通孔，以及形成在上部电极上的字线 电介质材料，使得顶部电极通过通孔连接到字线。

    Processing a copolymer to form a polymer memory cell
    6.
    发明授权
    Processing a copolymer to form a polymer memory cell 有权
    加工共聚物以形成聚合物记忆体

    公开(公告)号：US08012673B1

    公开(公告)日：2011-09-06

    申请号：US11068674

    申请日：2005-03-01

    申请人： Suzette K. Pangrle ,  Matthew S. Buynoski ,  Nicholas H. Tripsas ,  Uzodinma Okoroanyanwu

    发明人： Suzette K. Pangrle ,  Matthew S. Buynoski ,  Nicholas H. Tripsas ,  Uzodinma Okoroanyanwu

    IPC分类号： H01L21/02

    CPC分类号： H01L27/285 ,  H01L51/0035 ,  H01L51/004

    摘要： Disclosed are organic semiconductor devices containing a copolymer layer that contains a polymer dielectric and a semiconducting polymer formed using actinic radiation. As initially formed, the copolymer layer has dielectric properties, but portions may selectively rendered conductive after those portions are exposed to actinic radiation. Also disclosed are methods of making the organic semiconductor devices. Such devices are characterized by light weight and robust reliability.

    摘要翻译： 公开了包含含有聚合物电介质和使用光化辐射形成的半导体聚合物的共聚物层的有机半导体器件。 如最初形成的那样，共聚物层具有介电性质，但是在这些部分暴露于光化辐射之后，部分可以选择性地导电。 还公开了制造有机半导体器件的方法。 这样的装置的特征在于重量轻和鲁棒的可靠性。

    Coherent diffusion barriers for integrated circuit interconnects
    7.
    发明授权
    Coherent diffusion barriers for integrated circuit interconnects 有权
    用于集成电路互连的相干扩散屏障

    公开(公告)号：US06710452B1

    公开(公告)日：2004-03-23

    申请号：US09618964

    申请日：2000-07-19

    申请人： Pin-Chin Connie Wang ,  Matthew S. Buynoski ,  Suzette K. Pangrle ,  Amit P. Marathe

    发明人： Pin-Chin Connie Wang ,  Matthew S. Buynoski ,  Suzette K. Pangrle ,  Amit P. Marathe

    IPC分类号： H01L2348

    CPC分类号： H01L21/76843 ,  H01L21/76844 ,  H01L21/76855 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76886 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device and a device dielectric layer formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has a channel opening, a barrier layer lining the channel opening, and a conductor core filling the channel opening. The barrier layer has a more negative heat of formation than the channel dielectric layer whereby the barrier layer is reacts with and forms a barrier to diffusion of the material of the conductor core to the channel dielectric layer. The barrier layer also forms a stable compound with the conductor core to form a coherent barrier layer bonding the channel dielectric to the conductor core.

    摘要翻译： 提供了一种集成电路及其制造方法，其具有半导体衬底，半导体器件和形成在半导体衬底上的器件电介质层。 器件电介质层上的沟道电介质层具有通道开口，衬在通道开口的阻挡层和填充通道开口的导体芯。 阻挡层具有比通道介电层更加负的形成热量，由此阻挡层与导体芯的材料扩散到沟道介电层上形成阻挡层。 阻挡层还与导体芯形成稳定的化合物，以形成将沟道电介质结合到导体芯的相干势垒层。

    CuS formation by anodic sulfide passivation of copper surface
    9.
    发明授权
    CuS formation by anodic sulfide passivation of copper surface 有权
    通过铜表面的阳极硫化物钝化形成CuS

    公开(公告)号：US06893895B1

    公开(公告)日：2005-05-17

    申请号：US10885944

    申请日：2004-07-07

    申请人： Uzodinma Okoroanyanwu ,  Sergey D. Lopatin ,  Matthew S. Buynoski

    发明人： Uzodinma Okoroanyanwu ,  Sergey D. Lopatin ,  Matthew S. Buynoski

    IPC分类号： C25D9/06 ,  C25D11/34 ,  H01L51/40

    CPC分类号： C25D9/06 ,  C25D11/34

    摘要： Disclosed are methods of making memory cells and semiconductor devices containing the memory cells. The methods involve passivating a portion of a copper containing electrode to form a copper sulfide layer in an electrochemical cell by applying a current through a passivation solution containing a sulfide compound. Such devices containing the memory cells are characterized by light weight and robust reliability.

    摘要翻译： 公开了制造存储单元和包含存储单元的半导体器件的方法。 所述方法包括通过施加电流通过含有硫化物化合物的钝化溶液来钝化一部分含铜电极以在电化学电池中形成硫化铜层。 包含存储器单元的这种器件的特征在于重量轻和鲁棒的可靠性。