Method(s) facilitating formation of memory cell(s) and patterned conductive
    3.
    发明授权
    Method(s) facilitating formation of memory cell(s) and patterned conductive 失效
    促进形成记忆体和图案化的导电聚合物膜的方法

    公开(公告)号:US06753247B1

    公开(公告)日:2004-06-22

    申请号:US10285183

    申请日:2002-10-31

    IPC分类号: H01L214763

    摘要: A methodology for forming a memory cell is disclosed, wherein an organic polymer layer is formed over a conductive layer and an electrode layer is formed over the organic polymer layer. A first via is etched into the electrode and organic polymer layers, and a dielectric material is applied over the stack to at least fill in the first via. A second via is then etched into the dielectric material so as to expose and make the electrode layer available as a top electrode. A wordline is then formed over the dielectric material such that the top electrode is connected to the wordline by way of the second via. A memory device formed in accordance with the disclosed methodology includes a top electrode formed over an organic polymer layer, a conductive layer under the organic polymer layer, a via defined by a dielectric material and located above the top electrode, and a wordline formed over the dielectric material such that the top electrode is connected to the wordline by way of the via.

    摘要翻译: 公开了一种用于形成存储单元的方法,其中在导电层上形成有机聚合物层,并且在有机聚合物层上形成电极层。 将第一通孔蚀刻到电极和有机聚合物层中,并且将电介质材料施加到堆叠上以至少填充在第一通孔中。 然后将第二通道蚀刻到电介质材料中,以暴露并使电极层可用作顶部电极。 然后在电介质材料上形成字线,使得顶部电极通过第二通孔连接到字线。 根据所公开的方法形成的存储器件包括形成在有机聚合物层上的顶部电极,有机聚合物层下面的导电层,由电介质材料限定并位于顶部电极之上的通孔,以及形成在上部电极上的字线 电介质材料,使得顶部电极通过通孔连接到字线。

    Multi-cell organic memory element and methods of operating and fabricating
    6.
    发明授权
    Multi-cell organic memory element and methods of operating and fabricating 有权
    多单元有机存储元件及其操作和制造方法

    公开(公告)号:US06900488B1

    公开(公告)日:2005-05-31

    申请号:US10284946

    申请日:2002-10-31

    摘要: The present invention provides a multi-cell organic memory device that can operate as a non-volatile memory device having a plurality of multi-cell structures constructed within the memory device. A lower electrode can be formed, wherein one or more passive layers are formed on top of the lower electrode. An Inter Layer Dielectric (ILD) is formed above the passive layers and lower electrode, whereby a via or other type relief is created within the ILD and an organic semiconductor material is then utilized to partially fill the via above the passive layer. The portions of the via that are not filled with organic material are filled with dielectric material, thus forming a multi-dimensional memory structure above the passive layer or layers and the lower electrode. One or more top electrodes are then added above the memory structure, whereby distinctive memory cells are created within the organic portions of the memory structure and activated (e.g., read/write) between the top electrodes and bottom electrode, respectively. In this manner, multiple storage cells can be formed within a singular organic structure thereby increasing memory device density and storage.

    摘要翻译: 本发明提供一种多小区有机存储装置,其可以作为具有构造在存储装置内的多个多小区结构的非易失性存储装置来操作。 可以形成下电极,其中在下电极的顶部上形成一个或多个钝化层。 在无源层和下电极之上形成层间电介质(ILD),由此在ILD内产生通孔或其它类型的浮雕,然后利用有机半导体材料部分地填充钝化层以上的通孔。 通孔中没有填充有机材料的部分用电介质材料填充,从而在钝化层或下层电极之上形成多维存储结构。 然后在存储器结构上方添加一个或多个顶部电极,由此在存储器结构的有机部分内分别创建独特的存储单元,并分别在顶部电极和底部电极之间激活(例如,读取/写入)。 以这种方式,可以在单个有机结构内形成多个存储单元,从而增加存储器件密度和存储。

    Semiconductor device with self-aligned contacts using a liner oxide layer
    7.
    发明授权
    Semiconductor device with self-aligned contacts using a liner oxide layer 有权
    具有使用衬垫氧化物层的自对准触点的半导体器件

    公开(公告)号:US06420752B1

    公开(公告)日:2002-07-16

    申请号:US09502163

    申请日:2000-02-11

    IPC分类号: H01L29788

    摘要: A semiconductor device for minimizing auto-doping problems is disclosed. An etch stop layer is eliminated and is replaced with a consumable liner oxide layer so that stacked gate structures of the device can be positioned closer together, thus permitting shrinking of the device. The liner oxide layer is formed directly over a substrate and in contact with stacked gate structures, sidewall spacers, and sources and drains formed on the substrate, and serves as an auto-doping barrier for the dielectric layer to prevent boron and phosphorous formed in the dielectric layer from auto-doping into the sources and drains.

    摘要翻译: 公开了一种用于最小化自动掺杂问题的半导体器件。 蚀刻停止层被消除并且被可消耗的衬垫氧化物层代替,使得该器件的层叠栅极结构可以被更靠近地放置在一起,从而允许器件收缩。 衬垫氧化物层直接形成在衬底上并且与堆叠的栅极结构,侧壁间隔物以及形成在衬底上的源极和漏极接触并且用作介电层的自动掺杂势垒,以防止形成在衬底中的硼和磷 电介质层自动掺入源和漏极。

    Method for forming a semiconductor device with self-aligned contacts using a liner oxide layer
    8.
    发明授权
    Method for forming a semiconductor device with self-aligned contacts using a liner oxide layer 有权
    使用衬垫氧化物层形成具有自对准触点的半导体器件的方法

    公开(公告)号:US06475847B1

    公开(公告)日:2002-11-05

    申请号:US10109526

    申请日:2002-03-27

    IPC分类号: H01L218238

    摘要: A method for shrinking a semiconductor device and minimizing auto-doping problem is disclosed. An etch stop layer is eliminated and is replaced with a consumable liner oxide layer so that stacked gate structures of the device can be positioned closer together, thus permitting shrinking of the device. The liner oxide layer is formed directly over a substrate and in contact with stacked gate structures, sidewall spacers, and sources and drains formed on the substrate, and serves as an auto-doping barrier for the dielectric layer to prevent boron and phosphorous formed in the dielectric layer from auto-doping into the sources and drains.

    摘要翻译: 公开了一种缩小半导体器件并最小化自动掺杂问题的方法。 蚀刻停止层被消除并且被可消耗的衬垫氧化物层代替,使得该器件的层叠栅极结构可以被更靠近地放置在一起,从而允许器件收缩。 衬垫氧化物层直接形成在衬底上并与堆叠的栅极结构,侧壁间隔物以及形成在衬底上的源极和漏极接触,并且用作电介质层的自动掺杂势垒,以防止形成在衬底中的硼和磷 电介质层自动掺入源和漏极。

    Method of making an organic memory cell
    9.
    发明授权
    Method of making an organic memory cell 有权
    制造有机记忆体的方法

    公开(公告)号:US07374654B1

    公开(公告)日:2008-05-20

    申请号:US10978845

    申请日:2004-11-01

    摘要: A method of making an organic memory cell which comprises two electrodes with a controllably conductive media between the two electrodes is disclosed. The present invention involves providing a dielectric layer having formed therein one or more first electrode pads; removing a portion of the first electrode pad to form a recessed area on top of the pads and in the dielectric layer using reverse electroplating; forming a controllably conductive media over the first electrode pad in the recessed area; and forming a second electrode over the conductive media. The controllably conductive media contains an organic semiconductor layer and a passive layer.

    摘要翻译: 公开了一种制造有机存储单元的方法,该方法包括在两个电极之间具有可控导电介质的两个电极。 本发明涉及提供在其中形成有一个或多个第一电极焊盘的电介质层; 去除所述第一电极焊盘的一部分以在所述焊盘的顶部和所述电介质层中使用反向电镀形成凹陷区域; 在所述凹陷区域中的所述第一电极焊盘上形成可控导电介质; 以及在所述导电介质上形成第二电极。 可控导电介质包含有机半导体层和无源层。