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公开(公告)号：US6040022A
公开(公告)日：2000-03-21
申请号：US59734
申请日：1998-04-14
申请人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
发明人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
IPC分类号： C23C16/50 , C23C16/34 , C23C16/44 , C23C16/455 , C23C16/509 , B05D3/06 , C23C16/30
CPC分类号： C23C16/45565 , C23C16/345 , C23C16/455 , C23C16/5096
摘要： An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film, and is also useful for forming other dielectrics such as silicon oxide and silicon oxynitride. In particular, silicon oxynitride films are characterized by low hydrogen content and by compositional uniformity.
摘要翻译： 用于真空沉积室的入口气体歧管包括入口孔，其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气，从而增加了由氮气化学提供的氮化硅沉积速率，而不需要使用诸如氨的反应物。 虽然如果需要，可以在沉积气体化学中使用氨，该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对工艺和沉积膜的增强的控制，并且还可用于形成其它电介质，例如氧化硅和氮氧化硅。 特别地，氧氮化硅膜的特征在于低氢含量和组成均匀性。
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2.发明授权Inlet manifold and methods for increasing gas dissociation and for PECVD of dielectric films 失效用于增加气体离解和介电膜PECVD的入口歧管和方法
公开(公告)号：US4854263A
公开(公告)日：1989-08-08
申请号：US85424
申请日：1987-08-14
申请人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
发明人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
IPC分类号： C23C16/50 , C23C16/34 , C23C16/44 , C23C16/455 , C23C16/509
CPC分类号： C23C16/45565 , C23C16/345 , C23C16/455 , C23C16/5096
摘要： An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film, and is also useful for forming other dielectrics such as silicon oxide and silicon oxynitride. In particular, silicon oxynitride films are characterized by low hydrogen content and by compositional uniformity.
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公开(公告)号：US5773100A
公开(公告)日：1998-06-30
申请号：US746178
申请日：1996-11-06
申请人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
发明人： Mei Chang , David N. K. Wang , John M. White , Dan Maydan
IPC分类号： C23C16/50 , C23C16/34 , C23C16/44 , C23C16/455 , C23C16/509 , B05D3/06
CPC分类号： C23C16/45565 , C23C16/345 , C23C16/455 , C23C16/5096
摘要： An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film.
摘要翻译： 用于真空沉积室的入口气体歧管包括入口孔，其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气，从而增加了由氮气化学提供的氮化硅沉积速率，而不需要使用诸如氨的反应物。 虽然如果需要，可以在沉积气体化学中使用氨，该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对过程和沉积膜的增强的控制。
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4.发明授权UHF/VHF plasma for use in forming integrated circuit structures on semiconductor wafers 失效UHF / VHF等离子体，用于在半导体晶片上形成集成电路结构
公开(公告)号：US5300460A
公开(公告)日：1994-04-05
申请号：US32744
申请日：1993-03-16
IPC分类号： C23C16/509 , H01J37/32 , H05H1/46 , H01L21/00 , H01L21/02 , H01L21/22 , H01L21/265
CPC分类号： H01J37/32174 , C23C16/509 , H01J37/32082 , H05H1/46
摘要： An improved method of fabricating integrated circuit structures on semiconductor wafers using a plasma-assisted process is disclosed wherein the plasma is generated by a VHF/UHF power source at a frequency ranging from about 50 to about 800 MHz. Low pressure plasma-assisted etching or deposition processes, i.e., processes may be carried out within a pressure range not exceeding about 500 milliTorr; with a ratio of anode to cathode area of from about 2:1 to about 20:1, and an electrode spacing of from about 5 cm. to about 30 cm. High pressure plasma-assisted etching or deposition processes, i.e., processes may be carried out with a pressure ranging from over 500 milliTorr up to 50 Torr or higher; with an anode to cathode electrode spacing of less than about 5 cm. By carrying out plasma-assisted processes using plasma operated within a range of from about 50 to about 800 MHz, the electrode sheath voltages are maintained sufficiently low, so as to avoid damage to structures on the wafer, yet sufficiently high to preferably permit initiation of the processes without the need for supplemental power sources. Operating in this frequency range may also result in reduction or elimination of microloading effects.
摘要翻译： 公开了使用等离子体辅助方法制造半导体晶片上的集成电路结构的改进方法，其中等离子体由VHF / UHF电源以约50至约800MHz的频率产生。 低压等离子体辅助蚀刻或沉积工艺，即工艺可以在不超过约500毫托的压力范围内进行; 阳极与阴极面积的比例为约2:1至约20:1，电极间距约为5cm。 到约30厘米。 高压等离子体辅助蚀刻或沉积工艺，即工艺可以在500毫乇至50乇以上的压力下进行; 阳极至阴极间距小于约5厘米。 通过使用在约50至约800MHz的范围内操作的等离子体等离子体辅助处理，电极护套电压保持足够低，以避免损坏晶片上的结构，但足够高以优选允许引发 该过程无需补充电源。 在该频率范围内工作也可能导致微载物效应的降低或消除。
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公开(公告)号：US5210466A
公开(公告)日：1993-05-11
申请号：US852826
申请日：1992-03-13
IPC分类号： C23C16/509 , H01J37/32 , H05H1/46
CPC分类号： H01J37/32174 , C23C16/509 , H01J37/32082 , H01J37/32091 , H05H1/46 , H05K2201/10015 , H05K2201/10689
摘要： A plasma processing reactor is disclosed which incorporates an integral co-axial transmission line structure that effects low loss, very short transmission line coupling of ac power to the plasma chamber and therefore permits the effective use of VHF/UHF frequencies for generating a plasma. The use of VHF/UHF frequencies within the range 50-800 megahertz provides commercially viable processing rates (separate and simultaneous etching and deposition) and substantial reduction in sheath voltages compared to conventional frequencies such as 13.56 MHz. As a result, the probability of damaging electrically sensitive small geometry devices is reduced.
摘要翻译： 公开了一种等离子体处理反应器，其包括整体的同轴传输线结构，其将低功率损耗，非常短的传输线耦合到等离子体室，因此允许有效地使用VHF / UHF频率来产生等离子体。 在常规频率（如13.56 MHz）下，VHF / UHF频率在50-800兆赫兹范围内的使用提供了商业上可行的处理速率（分离和同步蚀刻和沉积）和皮套电压的显着降低。 结果，减少了电敏感小型几何装置的损坏概率。
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公开(公告)号：US5354387A
公开(公告)日：1994-10-11
申请号：US935951
申请日：1992-08-25
IPC分类号： C23C16/40 , H01L21/316 , H01L23/29 , H01L23/31 , H01L23/532 , H01L29/12 , H01L21/00 , H01L21/02 , H01L21/302
CPC分类号： H01L21/02129 , C23C16/401 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/02343 , H01L21/31625 , H01L23/291 , H01L23/3171 , H01L23/5329 , H01L2924/0002 , Y10S148/118
摘要： A composite BPSG insulating and planarizing layer is formed over stepped surfaces of a semiconductor wafer by a novel two step process. The composite BPSG layer is characterized by the absence of discernible voids and a surface which is resistant to loss of boron in a subsequent etching step. The two step deposition process comprises a first step to form a void-free BPSG layer by a CVD deposition using gaseous sources of phosphorus and boron dopants and tetraethylorthosilicate (TEOS) as the source of silicon; and then a second step to form a capping layer of BPSG by a plasma-assisted CVD deposition process while again using gaseous sources of phosphorus and boron dopants, and TEOS as the source of silicon, to provide a BPSG cap layer having a surface which is non-hygroscopic and resistant to loss of boron by subsequent etching.
摘要翻译： 通过新的两步法在半导体晶片的台阶表面上形成复合BPSG绝缘和平坦化层。 复合BPSG层的特征在于在随后的蚀刻步骤中不存在可辨别的空隙和耐受硼损失的表面。 两步沉积工艺包括通过使用磷和硼掺杂剂的气态源和原硅酸四乙酯（TEOS）作为硅源的CVD沉积来形成无空隙的BPSG层的第一步骤; 然后第二步骤，通过等离子体辅助CVD沉积工艺形成BPSG的覆盖层，同时再次使用磷和硼掺杂物的气体源和TEOS作为硅源，以提供具有表面的BPSG盖层 通过随后的蚀刻，不吸湿并且耐硼损失。
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7.发明授权Method for forming a boron phosphorus silicate glass composite layer on a semiconductor wafer 失效在半导体晶片上形成硼硅酸玻璃复合层的方法
公开(公告)号：US5166101A
公开(公告)日：1992-11-24
申请号：US649172
申请日：1991-02-01
IPC分类号： C23C16/40 , H01L21/316 , H01L23/29 , H01L23/31 , H01L23/532
CPC分类号： H01L21/02129 , C23C16/401 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/02343 , H01L21/31625 , H01L23/291 , H01L23/3171 , H01L23/5329 , H01L2924/0002 , Y10S148/118
摘要： A composite BPSG insulating and planarizing layer is formed over stepped surfaces of a semiconductor wafer by a novel two step process. The composite BPSG layer is characterized by the absence of discernible voids and a surface which is resistant to loss of boron in a subsequent etching step. The two step deposition process comprises a first step to form a void-free BPSG layer by a CVD deposition using gaseous sources of phosphorus and boron dopants and tetraethylorthosilicate (TEOS) as the source of silicon; and then a second step to form a capping layer of BPSG by a plasma-assisted CVD deposition process while again using gaseous sources of phosphorus and boron dpoants, and TEOS as the source of silicon, to provide a BPSG cap layer having a surface which is non-hygroscopic and resistant to loss of boron by subsequent etching.
摘要翻译： 通过新的两步法在半导体晶片的台阶表面上形成复合BPSG绝缘和平坦化层。 复合BPSG层的特征在于在随后的蚀刻步骤中不存在可辨别的空隙和耐受硼损失的表面。 两步沉积工艺包括通过使用磷和硼掺杂剂的气态源和原硅酸四乙酯（TEOS）作为硅源的CVD沉积来形成无空隙的BPSG层的第一步骤; 然后第二步骤，通过等离子体辅助CVD沉积工艺形成BPSG的覆盖层，同时再次使用磷和硼的气体源和TEOS作为硅源，以提供具有表面的BPSG盖层 通过随后的蚀刻，不吸湿并且耐硼损失。
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