中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.016 seconds)

    Wireless printed circuit board assembly with integral radio frequency waveguide
    1.
    发明授权
    Wireless printed circuit board assembly with integral radio frequency waveguide 有权

    公开(公告)号：US10658739B2

    公开(公告)日：2020-05-19

    申请号：US15586589

    申请日：2017-05-04

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Elad Mentovich ,  Yaakov Gridish ,  Oded Wertheim ,  Sylvie Rockman ,  Benny Koren

    IPC: H01Q1/38 ,  H01Q1/22 ,  H01Q13/02 ,  H01P3/12 ,  H01P5/12 ,  H05K1/18 ,  H05K1/02 ,  H01P1/208

    Abstract: An printed circuit board (PCB) assembly and method of assembling the same for a high-speed, short-reach communication link are described that provide a mechanism for transmitting radio frequency (RF) waves from one digital electronic component of the PCB assembly to another, where the second digital electronic component is located either on the same PCB assembly or on a second PCB assembly. The assembly includes a PCB having multiple layers and a digital electronic component supported by the PCB. At least one of the layers defines a channel that confines RF waves therein. An RF antenna in communication with the digital electronic component extends into the channel, and the RF antenna transmits RF signals generated by the digital electronic component into the channel as RF waves or receives RF waves via the channel and conveys corresponding RF signals to the digital electronic component.

    COMMUNICATION OVER MULTIPLE VIRTUAL LANES USING A SHARED BUFFER
    3.
    发明申请
    COMMUNICATION OVER MULTIPLE VIRTUAL LANES USING A SHARED BUFFER 有权
    通过使用共享缓冲区的多个虚拟路由器进行通信

    公开(公告)号：US20140269711A1

    公开(公告)日：2014-09-18

    申请号：US13802926

    申请日：2013-03-14

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Ran Ravid ,  Zachy Haramaty ,  Roy Kriss ,  Oded Wertheim

    IPC: H04L12/747 ,  H04L12/879

    CPC classification number: H04L45/742 ,  H04L47/125 ,  H04L47/30 ,  H04L47/39

    Abstract: A method for communication includes, in a sender node that sends packets to a receiver node over a physical link, making a decision, for a packet that is associated with a respective virtual link selected from among multiple virtual links, whether the receiver node is to buffer the packet in a dedicated buffer assigned to the respective virtual link or in a shared buffer that is shared among the multiple virtual links. The packet is sent, and the decision is signaled, from the sender node to the receiver node.

    Abstract translation: 一种用于通信的方法包括：在通过物理链路向接收方节点发送分组的发送方节点对与从多个虚拟链路中选择的相应虚拟链路相关联的分组作出决定，接收方节点是否 在分配给相应虚拟链路的专用缓冲器中或在多个虚拟链路之间共享的共享缓冲器中缓冲分组。 从发送方节点向接收方节点发送分组，并发送决定信号。

    Aggregation protocol
    4.
    发明申请
    Aggregation protocol 审中-公开
    聚合协议

    公开(公告)号：US20170063613A1

    公开(公告)日：2017-03-02

    申请号：US15250953

    申请日：2016-08-30

    Applicant: Mellanox Technologies Ltd.

    Inventor： Gil Bloch ,  Diego Crupnicoff ,  Benny Koren ,  Oded Wertheim ,  Lion Levi ,  Richard Graham ,  Michael Kagan

    IPC: H04L12/24 ,  H04L12/18 ,  H04L12/44

    CPC classification number: H04L12/185 ,  H04L12/44 ,  H04L41/12

    Abstract: A switch in a data network is configured to mediate data exchanges among network elements. The apparatus further includes a processor, which organizes the network elements into a hierarchical tree having a root node network element, vertex node network elements child node network elements that include leaf node network elements. The leaf node network elements are originate aggregation data and transmit the aggregation data to respective parent vertex node network elements. The vertex node network elements combine the aggregation data from at least a portion of the child node network elements, and transmit the combined aggregation data from the vertex node network elements to parent vertex node network elements. The root node network element is operative for initiating a reduction operation on the aggregation data.

    Abstract translation: 数据网络中的交换机被配置为中介网元之间的数据交换。 该装置还包括处理器，其将网络元件组织成具有根节点网络元件的分层树，顶点节点网络元素包括叶节点网络元素的子节点网络元素。 叶节点网元是始发聚合数据，并将聚合数据发送到相应的父顶点节点网元。 顶点节点网络元素组合来自至少一部分子节点网元的聚合数据，并将组合聚合数据从顶点节点网元发送到父顶点节点网元。 根节点网元可用于启动对聚合数据的简化操作。

    Uniting FDB lookups for encapsulated packets
    5.
    发明申请
    Uniting FDB lookups for encapsulated packets 有权
    统一封装数据包的FDB查找

    公开(公告)号：US20140269732A1

    公开(公告)日：2014-09-18

    申请号：US13845182

    申请日：2013-03-18

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Zachy Haramaty ,  Ran Shani ,  Oded Wertheim

    IPC: H04L12/741 ,  H04L12/713

    CPC classification number: H04L12/465 ,  H04L12/4654 ,  H04L12/4658

    Abstract: A method of communications at an encapsulating bridge includes receiving a packet having an unencapsulated-DA (destination address) and an associated encapsulation identifier. The unencapsulated-DA and the associated encapsulation identifier are used to determine a TxPort-unencapsulated network (unencapsulated network side transmit port) or an encapsulated-DA for the packet. This method reduces latency of processing by reducing lookups, thereby also increasing transmission bandwidth of the communications network. The invention also facilitates embodiments with reduced memory and processing requirements, as compared to conventional implementations. This method is particularly useful for MAC-in-MAC encapsulation.

    Abstract translation: 在封装桥接器处的通信方法包括接收具有未封装的DA（目的地地址）和相关联的封装标识符的分组。 未封装的DA和相关联的封装标识符用于确定用于分组的TxPort未封装的网络（未封装的网络侧发送端口）或封装的DA。 该方法通过减少查找来减少处理的延迟，从而也增加通信网络的传输带宽。 与传统实现相比，本发明还有助于减少存储器和处理要求的实施例。 该方法对于MAC-in-MAC封装特别有用。

    WIRELESS PRINTED CIRCUIT BOARD ASSEMBLY WITH INTEGRAL RADIO FREQUENCY WAVEGUIDE
    6.
    发明申请
    WIRELESS PRINTED CIRCUIT BOARD ASSEMBLY WITH INTEGRAL RADIO FREQUENCY WAVEGUIDE 审中-公开

    公开(公告)号：US20180323501A1

    公开(公告)日：2018-11-08

    申请号：US15586589

    申请日：2017-05-04

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Elad Mentovich ,  Yaakov Gridish ,  Oded Wertheim ,  Sylvie Rockman ,  Benny Koren

    IPC: H01Q1/38 ,  H01Q1/22 ,  H01Q13/00 ,  H01Q13/02

    CPC classification number: H01Q1/38 ,  H01Q1/2258 ,  H01Q13/00 ,  H01Q13/0283

    Abstract: An printed circuit board (PCB) assembly and method of assembling the same for a high-speed, short-reach communication link are described that provide a mechanism for transmitting radio frequency (RF) waves from one digital electronic component of the PCB assembly to another, where the second digital electronic component is located either on the same PCB assembly or on a second PCB assembly. The assembly includes a PCB having multiple layers and a digital electronic component supported by the PCB. At least one of the layers defines a channel that confines RF waves therein. An RF antenna in communication with the digital electronic component extends into the channel, and the RF antenna transmits RF signals generated by the digital electronic component into the channel as RF waves or receives RF waves via the channel and conveys corresponding RF signals to the digital electronic component.

    Communication over multiple virtual lanes using a shared buffer
    8.
    发明授权
    Communication over multiple virtual lanes using a shared buffer 有权
    使用共享缓冲区在多个虚拟通道上进行通信

    公开(公告)号：US08989011B2

    公开(公告)日：2015-03-24

    申请号：US13802926

    申请日：2013-03-14

    Applicant: Mellanox Technologies Ltd.

    Inventor： Ran Ravid ,  Zachy Haramaty ,  Roy Kriss ,  Oded Wertheim

    IPC: H04L12/801 ,  H04L12/747 ,  H04L12/879

    CPC classification number: H04L45/742 ,  H04L47/125 ,  H04L47/30 ,  H04L47/39

    Abstract: A method for communication includes, in a sender node that sends packets to a receiver node over a physical link, making a decision, for a packet that is associated with a respective virtual link selected from among multiple virtual links, whether the receiver node is to buffer the packet in a dedicated buffer assigned to the respective virtual link or in a shared buffer that is shared among the multiple virtual links. The packet is sent, and the decision is signaled, from the sender node to the receiver node.

    Abstract translation: 一种用于通信的方法包括：在通过物理链路向接收方节点发送分组的发送方节点对与从多个虚拟链路中选择的相应虚拟链路相关联的分组作出决定，接收方节点是否 在分配给相应虚拟链路的专用缓冲器中或在多个虚拟链路之间共享的共享缓冲器中缓冲分组。 从发送方节点向接收方节点发送分组，并发送决定信号。

    Aggregation protocol
    10.
    发明授权
    Aggregation protocol 有权

    公开(公告)号：US10284383B2

    公开(公告)日：2019-05-07

    申请号：US15250953

    申请日：2016-08-30

    Applicant: Mellanox Technologies Ltd.

    Inventor： Gil Bloch ,  Diego Crupnicoff ,  Benny Koren ,  Oded Wertheim ,  Lion Levi ,  Richard Graham ,  Michael Kagan

    IPC: H04L12/24 ,  H04L12/18 ,  H04L12/44

    Abstract: A switch in a data network is configured to mediate data exchanges among network elements. The apparatus further includes a processor, which organizes the network elements into a hierarchical tree having a root node network element, vertex node network elements, and child node network elements that include leaf node network elements. The leaf node network elements are originate aggregation data and transmit the aggregation data to respective parent vertex node network elements. The vertex node network elements combine the aggregation data from at least a portion of the child node network elements, and transmit the combined aggregation data from the vertex node network elements to parent vertex node network elements. The root node network element is operative for initiating a reduction operation on the aggregation data.

Patent Agency Ranking