Time-resolved emission microscopy system
    2.
    发明授权
    Time-resolved emission microscopy system 有权
    时间分辨放电显微镜系统

    公开(公告)号:US06469529B1

    公开(公告)日:2002-10-22

    申请号:US09580716

    申请日:2000-05-30

    IPC分类号: G01R31302

    CPC分类号: G01R31/311

    摘要: Integrated circuit devices are analyzed using an integrated system adapted to obtain time-resolved information from the back side of a silicon based semiconductor chip using hot carrier emissions. According to an example embodiment of the present invention, a system is adapted to analyze a semiconductor device under test (DUT) using a plurality of sensors mounted to a microscope having an objective lens. The plurality of sensors include a global acquisition sensor, a single-point acquisition sensor, and a navigation sensor. The integrated system is adapted to use the plurality of sensors individually and simultaneously. The integrated system improves the analysis of the DUT for reasons including that it makes possible the performance of more than one type of analysis simultaneously using a single test arrangement.

    摘要翻译: 使用集成系统分析集成电路器件,该系统适于使用热载流子发射从硅基半导体芯片的背面获得时间分辨信息。 根据本发明的示例性实施例,系统适用于使用安装在具有物镜的显微镜上的多个传感器来分析被测半导体器件(DUT)。 多个传感器包括全局采集传感器,单点采集传感器和导航传感器。 集成系统适于单独和同时使用多个传感器。 集成系统改进了DUT的分析原因,包括使用单个测试装置可以同时执行多种类型的分析。

    Repair of resistive electrical connections in an integrated circuit
    3.
    发明授权
    Repair of resistive electrical connections in an integrated circuit 失效
    修复集成电路中的电阻电气连接

    公开(公告)号:US06566888B1

    公开(公告)日:2003-05-20

    申请号:US09833250

    申请日:2001-04-11

    IPC分类号: G01R3108

    CPC分类号: H01L22/22 H01L21/76894

    摘要: The present invention is directed to the repair of resistive circuitry in an integrated circuit die having a multitude of circuit paths. According to an example embodiment of the present invention, a semiconductor die having a resistive electrical connection is analyzed. The location of a circuit portion in the die having a resistive electrical connection is identified. Using the identified location, the resistive circuit portion is annealed and the resistivity of that circuit portion is reduced. The reduced resistivity improves the ability of the die to operate at high speeds, and makes possible the repair and subsequent use of the die in various applications.

    摘要翻译: 本发明涉及具有多个电路路径的集成电路管芯中的电阻电路的修复。 根据本发明的示例性实施例,分析具有电阻电连接的半导体管芯。 识别具有电阻电连接的管芯中的电路部分的位置。 使用识别的位置,对电阻电路部分进行退火,并减小该电路部分的电阻率。 降低的电阻率提高了模具在高速下运行的能力,并且使得可以在各种应用中修复和随后使用模具。

    Arrangement and method for providing an imaging path using a silicon-crystal damaging laser
    5.
    发明授权
    Arrangement and method for providing an imaging path using a silicon-crystal damaging laser 失效
    使用硅晶体损伤激光器提供成像路径的布置和方法

    公开(公告)号:US06709985B1

    公开(公告)日:2004-03-23

    申请号:US09383781

    申请日:1999-08-26

    IPC分类号: H01L21302

    摘要: According to one aspect of the disclosure, laser-thermal annealing is used to clear an imaging path through the back side of a semiconductor device after the back side of the chip has been thinned to expose a selected region in the substrate. For many applications, thinning results in the formation of crystal defects that inhibit the ability to obtain images through the back side of the semiconductor device. One example embodiment overcomes this problem by thinning via laser-chemical etching the back side of the semiconductor device under a pressure exceeding a threshold level, and then reducing the pressure to a level below the threshold level and scanning the back side of the semiconductor device using a laser at a reduced power level. IR microscopy is then used to capture an image of a circuit in the circuit side of the semiconductor device through the back side of the semiconductor device. One particular example application is directed to a flip-chip semiconductor device. Another aspect of the invention is directed to clearing collision-induced viewing impairments, as may be caused by plasma etching.

    摘要翻译: 根据本公开的一个方面,在芯片的背面已经变薄以暴露衬底中的选定区域之后,使用激光热退火来清除半导体器件背面的成像路径。 对于许多应用,稀化导致晶体缺陷的形成,其阻止通过半导体器件的背面获得图像的能力。 一个示例性实施例通过在超过阈值水平的压力下通过激光化学蚀刻半导体器件的背面稀化,然后将压力降低到阈值水平以下并且使用 激光功率降低。 然后使用IR显微镜通过半导体器件的背面来捕获半导体器件的电路侧的电路的图像。 一个特定示例应用涉及倒装芯片半导体器件。 本发明的另一方面涉及清除由等离子体蚀刻引起的碰撞诱发的视力损伤。

    Defect detection in semiconductor devices
    6.
    发明授权
    Defect detection in semiconductor devices 失效
    半导体器件缺陷检测

    公开(公告)号:US06686757B1

    公开(公告)日:2004-02-03

    申请号:US09409217

    申请日:1999-09-30

    IPC分类号: G01R3128

    CPC分类号: G01R31/311

    摘要: According to an example embodiment of the present invention, a defect detection approach involves detecting the existence of defects in an integrated circuit as a function of at least one applied energy source. In response to energy that is applied to the integrated circuit, response signals are detected. A parameter including information such as amplitude, frequency, phase, or a spectrum is developed for a reference integrated circuit device and then compared to the detected response signal. The deviation in the response and reference signals, and the type of energy source used, are correlated to a particular defect in the device.

    摘要翻译: 根据本发明的示例性实施例,缺陷检测方法包括检测作为至少一个应用能量源的函数的集成电路中的缺陷的存在。 响应于施加到集成电路的能量,检测响应信号。 为参考集成电路器件开发包括振幅,频率,相位或频谱等信息的参数,然后与检测到的响应信号进行比较。 响应和参考信号的偏差以及所使用的能量源的类型与设备中的特定缺陷相关。

    Quadrant avalanche photodiode time-resolved detection
    7.
    发明授权
    Quadrant avalanche photodiode time-resolved detection 失效
    象限雪崩光电二极管时间分辨检测

    公开(公告)号:US06483327B1

    公开(公告)日:2002-11-19

    申请号:US09409088

    申请日:1999-09-30

    IPC分类号: G01R31302

    CPC分类号: G01R1/071 G01R31/311

    摘要: A method and system providing spatial and timing resolution for photoemission microscopy of an integrated circuit. A microscope having an objective lens forming a focal plane is arranged to view the integrated circuit, and an aperture element having an aperture is optically aligned in the back focal plane of the microscope. The aperture element is positioned for viewing a selected area of the integrated circuit. A position-sensitive avalanche photo-diode is optically aligned with the aperture to detect photoemissions when test signals are applied to the integrated circuit.

    摘要翻译: 一种为集成电路的光电显微镜提供空间和时序分辨率的方法和系统。 具有形成焦平面的物镜的显微镜被布置成观看集成电路,并且具有孔的孔径元件在显微镜的后焦平面中被光学对准。 光圈元件被定位成用于观看集成电路的选定区域。 位置敏感的雪崩光电二极管与孔径光学对准以在测试信号被施加到集成电路时检测光电发射。

    Acoustic 3D analysis of circuit structures
    8.
    发明授权
    Acoustic 3D analysis of circuit structures 失效
    电路结构的声学3D分析

    公开(公告)号:US06430728B1

    公开(公告)日:2002-08-06

    申请号:US09410147

    申请日:1999-09-30

    IPC分类号: G06F1750

    CPC分类号: G01R31/307 G10K15/046

    摘要: According to an example embodiment, the present invention is directed to a system and method for analyzing an integrated circuit. A laser is directed to the back side of an integrated circuit and causes local heating, which generates acoustic energy in the circuit. The acoustic energy propagation in the integrated circuit is detected via at least two detectors. Using the detected acoustic energy from the detectors, at least one circuit defect is detected and located.

    摘要翻译: 根据示例性实施例,本发明涉及用于分析集成电路的系统和方法。 激光被引导到集成电路的背面,并引起局部加热,其在电路中产生声能。 通过至少两个检测器检测集成电路中的声能传播。 使用来自检测器的检测到的声能,检测和定位至少一个电路缺陷。

    Selective state change analysis of a SOI die
    9.
    发明授权
    Selective state change analysis of a SOI die 失效
    SOI裸片的选择状态变化分析

    公开(公告)号:US06414335B1

    公开(公告)日:2002-07-02

    申请号:US09864688

    申请日:2001-05-23

    IPC分类号: H01L2358

    CPC分类号: G01R31/312 G01R31/307

    摘要: Analysis of a semiconductor die having silicon-on-insulator (SOI) structure is enhanced by capacitively coupling a signal to the die. According to an example embodiment of the present invention, a die having a thinned back side is analyzed by capacitively coupling an input signal through the insulator portion of the SOI structure and effecting a state change to circuitry in the die. The state change is used to evaluate a characteristic of the die, such as by detecting a response to the state change. The ability to force such a state change is helpful for evaluating dies having SOI structure, and is particularly useful for evaluation techniques that require or benefit from maintaining the insulator portion of the SOI structure intact.

    摘要翻译: 通过将信号电容耦合到管芯来增强具有绝缘体上硅(SOI)结构的半导体管芯的分析。 根据本发明的示例性实施例,通过电容耦合通过SOI结构的绝缘体部分的输入信号并对模具中的电路进行状态分析来分析具有减薄背侧的管芯。 状态变化用于评估管芯的特性,例如通过检测对状态变化的响应。 强制这种状态变化的能力有助于评估具有SOI结构的管芯,并且对于需要或受益于保持SOI结构的绝缘体部分而完整的评估技术特别有用。

    High resolution heat exchange
    10.
    发明授权
    High resolution heat exchange 失效
    高分辨率热交换

    公开(公告)号:US06836132B1

    公开(公告)日:2004-12-28

    申请号:US10113604

    申请日:2002-03-29

    IPC分类号: G01R3128

    摘要: A semiconductor device is analyzed and manufactured using a heat-exchange probe. According to an example embodiment of the present invention, a heat-exchange probe is controlled to exchange heat to a portion of a semiconductor device using sub-micron resolution. In one implementation, sub-micron resolution is achieved using a navigational arrangement, such as microscope, adapted to direct light to within about one micron of a target circuit portion on a plane of the device. In another implementation, a physical heat probe tip (e.g., a metal probe having about a one micron diameter probe tip) is navigated to a selected portion of the device using sub-micron navigational resolution. In each of these implementations, as well as others, the heat exchange is preponderantly confined to within about a one micron radius of a target portion of circuitry on lateral plane of the device. With this approach, heat exchange can be controlled to selectively stimulate circuitry within the device, which is particularly useful in high-density circuit implementations.

    摘要翻译: 使用热交换探针分析和制造半导体器件。 根据本发明的示例性实施例,控制热交换探针以使用亚微米分辨率将热量交换到半导体器件的一部分。 在一个实施方案中,使用诸如显微镜的导航装置来实现亚微米分辨率,其适于将光引导到设备平面上的目标电路部分的约一微米内。 在另一个实施方案中,使用亚微米导航分辨率将物理热探针尖端(例如,具有约一微米直径的探针尖端的金属探针)导航到装置的选定部分。 在这些实施方案的每一个以及其它实施方案中,热交换主要被限制在装置的横向平面上的电路的目标部分的约一微米半径内。 利用这种方法,可以控制热交换以选择性地刺激装置内的电路,这在高密度电路实现中特别有用。