摘要:
Semiconductor analysis is improved via the use of fiber optic communications. According to an example embodiment of the present invention, a stimulation device is adapted to stimulate an integrated circuit die, and the die generates a response to the stimulation. An optical signal generator, either incorporated into the die or coupled to the die, detects the response, converts the response to an optical signal and transmits the optical signal. The optical signal is received at a testing arrangement adapted to analyze the die therefrom. The optical signal is used to analyze the die, improving signal quality and the ability to perform high-speed analysis of the die.
摘要:
According to an example embodiment of the present invention, a defect detection approach involves detecting the existence of defects in an integrated circuit as a function of at least one applied energy source. In response to energy that is applied to the integrated circuit, response signals are detected. A parameter including information such as amplitude, frequency, phase, or a spectrum is developed for a reference integrated circuit device and then compared to the detected response signal. The deviation in the response and reference signals, and the type of energy source used, are correlated to a particular defect in the device.
摘要:
A method and system providing spatial and timing resolution for photoemission microscopy of an integrated circuit. A microscope having an objective lens forming a focal plane is arranged to view the integrated circuit, and an aperture element having an aperture is optically aligned in the back focal plane of the microscope. The aperture element is positioned for viewing a selected area of the integrated circuit. A position-sensitive avalanche photo-diode is optically aligned with the aperture to detect photoemissions when test signals are applied to the integrated circuit.
摘要:
According to an example embodiment, the present invention is directed to a system and method for analyzing an integrated circuit. A laser is directed to the back side of an integrated circuit and causes local heating, which generates acoustic energy in the circuit. The acoustic energy propagation in the integrated circuit is detected via at least two detectors. Using the detected acoustic energy from the detectors, at least one circuit defect is detected and located.
摘要:
According to one aspect of the disclosure, the present invention provides methods and arrangements for milling the substrate of a semiconductor device and exposing a selected region in the substrate. A laser is directed at a selected area of the back side of the device to create a small marker to be used for alignment during the milling process. The substrate is then milled to expose the selected area within the substrate, using the marker as alignment.
摘要:
Analysis of a semiconductor die having silicon-on-insulator (SOI) structure is enhanced by capacitively coupling a signal to the die. According to an example embodiment of the present invention, a die having a thinned back side is analyzed by capacitively coupling an input signal through the insulator portion of the SOI structure and effecting a state change to circuitry in the die. The state change is used to evaluate a characteristic of the die, such as by detecting a response to the state change. The ability to force such a state change is helpful for evaluating dies having SOI structure, and is particularly useful for evaluation techniques that require or benefit from maintaining the insulator portion of the SOI structure intact.
摘要:
Analysis of a semiconductor die having silicon-on-insulator (SOI) structure is enhanced by accessing the circuitry within the die from the back side without necessarily breaching the insulator layer of the SOI structure. According to an example embodiment of the present invention, a semiconductor die having a SOI structure and a backside opposite circuitry in a circuit side is analyzed. An atomic force microscope is scanned across a thinned portion of the back side. The microscope responds to an electrical characteristic, such as a logic state, coupled from circuitry via the insulator portion of the die over which the microscope is being scanned. The response of the microscope to the die is detected and used to detect an electrical characteristic of the die.
摘要:
Analysis of a flip-chip type IC die having SOI structure is enhanced via analysis and repair of the die that make possible analysis that would typically result in the die being in a state of disrepair. According to an example embodiment of the present invention, a focused ion beam (FIB) is directed at a back side of a flip-chip die having a circuitry in a circuit side opposite a back side, wherein the circuitry including silicon on insulator (SOI) structure. The FIB is used to remove a selected portion of substrate including a portion of the insulator of the SOI structure from the die. The removed substrate exposes an insulator region in the die, and a signal is coupled from circuitry in the die via the exposed insulator region and used to analyze the die. Material is deposited in the exposed region and the selected portion of the die that had been removed is reconstructed. The reconstruction takes place before, during or after the signal is coupled, depending upon the die being analyzed and the type of analysis being performed. In this manner, access for analyzing the die is improved via the ability to couple a signal through the insulator and to repair a portion of the die that has been altered for analysis. Analysis that would otherwise be destructive can be performed and the ability of the die to function after analysis can be maintained.
摘要:
According to an example embodiment, a semiconductor device having a back side and a circuit side opposite the back side is analyzed. The semiconductor device includes bulk silicon in the back side and also includes epitaxial silicon. An ion gas comprising SF6 and N2 is directed at a target region in the back side. Using the ion gas, the target region in the back side is selectively etched using reactive ion etching (RIE) and an exposed region is formed. The etching is selective to the bulk silicon. When the etching process encounters the epitaxial silicon, the etch rate slows and is used as an endpoint indicator of the selective etching process. Once the etching process is stopped, the circuitry is accessed via the exposed region.
摘要:
The present invention is directed to a method for post-manufacturing analysis of a semiconductor device including a die in a semiconductor device package. According to an example embodiment of the present invention, the package is removed and the die is exposed. Conductive ions are impregnated in a region of the die and a diode is formed. Using the formed diode, target circuitry within the die is analyzed. In this manner, a diode can be formed and used for purposes such as testing or repairing a die.