-
公开(公告)号:US11641741B2
公开(公告)日:2023-05-02
申请号:US17016039
申请日:2020-09-09
Applicant: Micron Technology, Inc.
Inventor: Kaiming Luo , Sarfraz Qureshi , Md Zakir Ullah , Jessica Jing Wen Low , Harsh Narendrakumar Jain , Kok Siak Tang , Indra V. Chary , Matthew J. King
IPC: H01L27/11521 , H01L27/11582 , H01L27/11556 , H01L27/11568
Abstract: Microelectronic devices include a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A series of slit structures extends through the stack structure and divides the stack structure into a series of blocks. In a progressed portion of the series of blocks, each block comprises an array of pillars extending through the stack structure of the block. Also, each block—in the progressed portion—has a different block width than a block width of a neighboring block of the progressed portion of the series of blocks. At least one pillar, of the pillars of the array of pillars in the progressed portion, exhibits bending. Related methods and electronic systems are also disclosed.
-
公开(公告)号:US11600630B2
公开(公告)日:2023-03-07
申请号:US16988156
申请日:2020-08-07
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Nancy M. Lomeli , John D. Hopkins , Jiewei Chen , Indra V. Chary , Jun Fang , Vladimir Samara , Kaiming Luo , Rita J. Klein , Xiao Li , Vinayak Shamanna
IPC: H01L27/11568 , H01L27/11556 , H01L27/11582 , G11C5/06 , H01L21/306 , G11C16/04 , G11C5/02
Abstract: Some embodiments include an integrated assembly having a source structure, and having a stack of alternating conductive levels and insulative levels over the source structure. Cell-material-pillars pass through the stack. The cell-material-pillars are arranged within a configuration which includes a first memory-block-region and a second memory-block-region. The cell-material-pillars include channel material which is electrically coupled with the source structure. Memory cells are along the conductive levels and include regions of the cell-material-pillars. A panel is between the first and second memory-block-regions. The panel has a first material configured as a container shape. The container shape defines opposing sides and a bottom of a cavity. The panel has a second material within the cavity. The second material is compositionally different from the first material. Some embodiments include methods of forming integrated assemblies.
-
公开(公告)号:US12250812B2
公开(公告)日:2025-03-11
申请号:US18094906
申请日:2023-01-09
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Nancy M. Lomeli , John D. Hopkins , Jiewei Chen , Indra V. Chary , Jun Fang , Vladimir Samara , Kaiming Luo , Rita J. Klein , Xiao Li , Vinayak Shamanna
Abstract: Some embodiments include an integrated assembly having a source structure, and having a stack of alternating conductive levels and insulative levels over the source structure. Cell-material-pillars pass through the stack. The cell-material-pillars are arranged within a configuration which includes a first memory-block-region and a second memory-block-region. The cell-material-pillars include channel material which is electrically coupled with the source structure. Memory cells are along the conductive levels and include regions of the cell-material-pillars. A panel is between the first and second memory-block-regions. The panel has a first material configured as a container shape. The container shape defines opposing sides and a bottom of a cavity. The panel has a second material within the cavity. The second material is compositionally different from the first material. Some embodiments include methods of forming integrated assemblies.
-
公开(公告)号:US20240357809A1
公开(公告)日:2024-10-24
申请号:US18637129
申请日:2024-04-16
Applicant: Micron Technology, Inc.
Inventor: Zeyar Lin Aung , Kaiming Luo , Saurabh Jagdishbhai Kasodariya , Sumeet C. Pandey , Brittany L. Kohoutek , Yuwei Ma , Kyle A. Ritter
IPC: H10B43/20
CPC classification number: H10B43/20
Abstract: Methods, systems, and devices for support structures for tier deflection in a memory system are described. The memory system may include a word line contact that extends through a stack of materials and lands on a tier of a word line. The word line contact may be between four support structures that form a diamond around the word line contact. Two support structures that form opposite vertices of the diamond may align centrally with the word line contact in a lateral direction and two other support structures that form opposite vertices of the diamond may align centrally with the word line contact in a longitudinal direction.
-
公开(公告)号:US20230164991A1
公开(公告)日:2023-05-25
申请号:US18094906
申请日:2023-01-09
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Nancy M. Lomeli , John D. Hopkins , Jiewei Chen , Indra V. Chary , Jun Fang , Vladimir Samara , Kaiming Luo , Rita J. Klein , Xiao Li , Vinayak Shamanna
CPC classification number: H10B41/27 , G11C5/06 , H01L21/30625 , G11C16/0408 , G11C16/0466 , G11C5/025 , H10B43/27 , H10B43/30
Abstract: Some embodiments include an integrated assembly having a source structure, and having a stack of alternating conductive levels and insulative levels over the source structure. Cell-material-pillars pass through the stack. The cell-material-pillars are arranged within a configuration which includes a first memory-block-region and a second memory-block-region. The cell-material-pillars include channel material which is electrically coupled with the source structure. Memory cells are along the conductive levels and include regions of the cell-material-pillars. A panel is between the first and second memory-block-regions. The panel has a first material configured as a container shape. The container shape defines opposing sides and a bottom of a cavity. The panel has a second material within the cavity. The second material is compositionally different from the first material. Some embodiments include methods of forming integrated assemblies.
-
公开(公告)号:US20220077178A1
公开(公告)日:2022-03-10
申请号:US17016039
申请日:2020-09-09
Applicant: Micron Technology, Inc.
Inventor: Kaiming Luo , Sarfraz Qureshi , Md Zakir Ullah , Jessica Low Jing Wen , Harsh Narendrakumar Jain , Kok Siak Tang , Indra V. Chary , Matthew J. King
IPC: H01L27/11582 , H01L27/11556
Abstract: Microelectronic devices include a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A series of slit structures extends through the stack structure and devices the stack structure into a series of blocks. In a progressed portion of the series of blocks, each block comprises an array of pillars extending the through the stack structure of the block. Also, each block—in the progressed portion—has a different block width than a block width of a neighboring block of the progressed portion of the series of blocks. At least one pillar, of the pillars of the array of pillars in the progressed portion, exhibits bending. Related methods and electronic systems are also disclosed.
-
-
-
-
-