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    Methods of Forming a Pattern On a Substrate
    1.
    发明申请
    Methods of Forming a Pattern On a Substrate 有权
    在基材上形成图案的方法

    公开(公告)号：US20140342563A1

    公开(公告)日：2014-11-20

    申请号：US13893546

    申请日：2013-05-14

    Applicant: Micron Technology, Inc.

    Inventor： Scott L. Light ,  Kyle Armstrong ,  Michael D. Hyatt ,  Vishal Sipani

    IPC: H01L21/308

    CPC classification number: H01L21/3086 ,  H01L21/0337

    Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.

    Abstract translation: 在衬底上形成图案的方法包括形成从第一平版印刷图案化步骤导出的间隔开的第一特征。 侧壁间隔件形成在第一特征的相对侧上。 在形成侧壁间隔物之后，形成从第二平版印刷图案化步骤得到的隔开的第二特征。 第二特征中的至少一些个体在穿过第一和第二特征的至少一个直线垂直横截面中在第一特征之间横向间隔开并且横向间隔开。 在第二平版印刷图案化步骤之后，所有至少一个横截面中的所有侧壁间隔物都被去除。

    Methods of forming a pattern on a substrate
    2.
    发明授权
    Methods of forming a pattern on a substrate 有权
    在基板上形成图案的方法

    公开(公告)号：US08969214B2

    公开(公告)日：2015-03-03

    申请号：US13893546

    申请日：2013-05-14

    Applicant: Micron Technology, Inc.

    Inventor： Scott L. Light ,  Kyle Armstrong ,  Michael D. Hyatt ,  Vishal Sipani

    IPC: H01L21/302 ,  H01L21/308

    CPC classification number: H01L21/3086 ,  H01L21/0337

    Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.

    Abstract translation: 在衬底上形成图案的方法包括形成从第一平版印刷图案化步骤导出的间隔开的第一特征。 侧壁间隔件形成在第一特征的相对侧上。 在形成侧壁间隔物之后，形成从第二平版印刷图案化步骤得到的隔开的第二特征。 第二特征中的至少一些个体在穿过第一和第二特征的至少一个直线垂直横截面中在第一特征之间横向间隔开并且横向间隔开。 在第二平版印刷图案化步骤之后，所有至少一个横截面中的所有侧壁间隔物都被去除。

    Semiconductor constructions
    3.
    发明授权
    Semiconductor constructions 有权

    公开(公告)号：US10217706B2

    公开(公告)日：2019-02-26

    申请号：US15685907

    申请日：2017-08-24

    Applicant: Micron Technology, Inc.

    Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

    IPC: H01L23/525 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532

    Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

    Patterning methods and methods of forming electrically conductive lines
    5.
    发明授权
    Patterning methods and methods of forming electrically conductive lines 有权
    形成导电线的图案化方法和方法

    公开(公告)号：US09048292B2

    公开(公告)日：2015-06-02

    申请号：US13660860

    申请日：2012-10-25

    Applicant: Micron Technology, Inc.

    Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

    IPC: H01L21/00 ,  H01L21/768 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213

    CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

    Abstract translation: 一些实施例包括形成导电线的方法。 光致抗蚀剂特征形成在衬底上，其中至少一个光致抗蚀剂特征具有变窄的区域。 修整光致抗蚀剂特征，其穿过狭窄区域以形成间隙。 隔板沿光致抗蚀剂特征的侧壁形成。 间隙中的两个垫片合并在一起。 去除光致抗蚀剂特征以留下包括间隔物的图案。 该图案延伸到衬底中以在衬底内形成多个凹槽。 导电材料形成在凹槽内以形成导电线。 一些实施例包括在半导体衬底上具有多条线的半导体结构。 两条线彼此相邻并且基本上彼此平行，除了在所述两条线彼此合并的区域中。

    Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines
    6.
    发明申请
    Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines 有权
    形成导电线的半导体结构，图案化方法和方法

    公开(公告)号：US20140117529A1

    公开(公告)日：2014-05-01

    申请号：US13660860

    申请日：2012-10-25

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

    IPC: H01L21/32 ,  H01L23/48 ,  H01L23/58 ,  H01L21/22 ,  H01L21/768

    CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

    Abstract translation: 一些实施例包括形成导电线的方法。 光致抗蚀剂特征形成在衬底上，其中至少一个光致抗蚀剂特征具有变窄的区域。 修整光致抗蚀剂特征，其穿过狭窄区域以形成间隙。 隔板沿光致抗蚀剂特征的侧壁形成。 间隙中的两个垫片合并在一起。 去除光致抗蚀剂特征以留下包括间隔物的图案。 该图案延伸到衬底中以在衬底内形成多个凹槽。 导电材料形成在凹槽内以形成导电线。 一些实施例包括在半导体衬底上具有多条线的半导体结构。 两条线彼此相邻并且基本上彼此平行，除了在所述两条线彼此合并的区域中。

    Substrates And Methods Of Forming A Pattern On A Substrate
    9.
    发明申请
    Substrates And Methods Of Forming A Pattern On A Substrate 有权
    基板和基板上形成图案的方法

    公开(公告)号：US20150321447A1

    公开(公告)日：2015-11-12

    申请号：US14788890

    申请日：2015-07-01

    Applicant: Micron Technology, Inc.

    Inventor： Vishal Sipani ,  David A. Kewley ,  Kyle Armstrong ,  Michael Dean Van Patten ,  Michael D. Hyatt

    IPC: B32B3/30

    CPC classification number: B32B3/30 ,  G03F7/0035 ,  G03F7/2002 ,  G03F7/40 ,  H01L21/0337 ,  H01L21/31144 ,  Y10T428/24521 ,  Y10T428/24612

    Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.

    Abstract translation: 衬底和在衬底上形成图案的方法。 图案包括重复图案区域和与重复图案区域相邻的图案中断区域。 在衬底上形成掩模，其中掩模包括重复图案区域和图案中断区域，并且使用两个单独的掩蔽步骤形成掩模。 该掩模用于将图案形成到其上接收掩模的下面的基底材料中。 还公开了包括掩模的基板。

    Patterning Methods and Methods of Forming Electrically Conductive Lines
    10.
    发明申请
    Patterning Methods and Methods of Forming Electrically Conductive Lines 有权
    形成导电线的图案化方法和方法

    公开(公告)号：US20150235938A1

    公开(公告)日：2015-08-20

    申请号：US14699664

    申请日：2015-04-29

    Applicant: Micron Technology, Inc.

    Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

    IPC: H01L23/525 ,  H01L23/532

    CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

    Abstract translation: 一些实施例包括形成导电线的方法。 光致抗蚀剂特征形成在衬底上，其中至少一个光致抗蚀剂特征具有变窄的区域。 修整光致抗蚀剂特征，其穿过狭窄区域以形成间隙。 隔板沿光致抗蚀剂特征的侧壁形成。 间隙中的两个垫片合并在一起。 去除光致抗蚀剂特征以留下包括间隔物的图案。 该图案延伸到衬底中以在衬底内形成多个凹槽。 导电材料形成在凹槽内以形成导电线。 一些实施例包括在半导体衬底上具有多条线的半导体结构。 两条线彼此相邻并且基本上彼此平行，除了在所述两条线彼此合并的区域中。

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