公开(公告)号：US08969214B2

公开(公告)日：2015-03-03

申请号：US13893546

申请日：2013-05-14

Applicant: Micron Technology, Inc.

Inventor： Scott L. Light ,  Kyle Armstrong ,  Michael D. Hyatt ,  Vishal Sipani

IPC: H01L21/302 ,  H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/0337

Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.

Abstract translation: 在衬底上形成图案的方法包括形成从第一平版印刷图案化步骤导出的间隔开的第一特征。 侧壁间隔件形成在第一特征的相对侧上。 在形成侧壁间隔物之后，形成从第二平版印刷图案化步骤得到的隔开的第二特征。 第二特征中的至少一些个体在穿过第一和第二特征的至少一个直线垂直横截面中在第一特征之间横向间隔开并且横向间隔开。 在第二平版印刷图案化步骤之后，所有至少一个横截面中的所有侧壁间隔物都被去除。

公开(公告)号：US20130302981A1

公开(公告)日：2013-11-14

申请号：US13941747

申请日：2013-07-15

Applicant: Micron Technology, Inc.

Inventor： Dan Millward ,  Kaveri Jain ,  Zishu Zhang ,  Lijing Gou ,  Anton J. deVilliers ,  Jianming Zhou ,  Yuan He ,  Michael D. Hyatt ,  Scott L. Light

IPC: H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10882 ,  H01L27/10888

Abstract: Some embodiments include methods of forming patterns. A semiconductor substrate is formed to comprise an electrically insulative material over a set of electrically conductive structures. An interconnect region is defined across the electrically conductive structures, and regions on opposing sides of the interconnect region are defined as secondary regions. A two-dimensional array of features is formed over the electrically insulative material. The two-dimensional array extends across the interconnect region and across the secondary regions. A pattern of the two-dimensional array is transferred through the electrically insulative material of the interconnect region to form contact openings that extend through the electrically insulative material and to the electrically conductive structures, and no portions of the two-dimensional array of the secondary regions is transferred into the electrically insulative material.

Abstract translation: 一些实施例包括形成图案的方法。 半导体衬底被形成为在一组导电结构之上包括电绝缘材料。 跨导电结构限定互连区域，并且互连区域的相对侧上的区域被定义为次级区域。 特征的二维阵列形成在电绝缘材料上。 二维阵列跨越互连区域并跨越次级区域延伸。 二维阵列的图案通过互连区域的电绝缘材料转移以形成延伸穿过电绝缘材料和导电结构的接触开口，并且二次区域的二维阵列的任何部分 被转移到电绝缘材料中。

公开(公告)号：US20150099362A1

公开(公告)日：2015-04-09

申请号：US14049135

申请日：2013-10-08

Applicant: Micron Technology, Inc.

Inventor： Scott L. Light ,  Vishal Sipani ,  Michael D. Hyatt

IPC: H01L21/308

CPC classification number: H01L21/0337

Abstract: A method including forming a line pattern in a substrate includes using a plurality of longitudinally spaced projecting features formed along respective guide lines as a template in forming a plurality of directed self-assembled (DSA) lines that individually comprise at least one of (a): the spaced projecting features and DSA material longitudinally there-between, and (b): are laterally between and laterally spaced from immediately adjacent of the guide lines. Substrate material elevationally inward of and laterally between the DSA lines may be processed using the DSA lines as a mask.

Abstract translation: 包括在衬底中形成线图案的方法包括在形成多个定向自组装（DSA）线时使用沿着相应引导线形成的多个纵向间隔开的突出特征作为模板，所述定向自组装（DSA）线分别包括以下中的至少一个：（a） ：在其间纵向延伸的间隔开的突出特征和DSA材料，和（b）之间：在紧邻引导线之间横向间隔开并且横向间隔开。 可以使用DSA线作为掩模来处理DSA线之间和横向上的基底材料。

公开(公告)号：US20150015860A1

公开(公告)日：2015-01-15

申请号：US14500625

申请日：2014-09-29

Applicant: Micron Technology, Inc.

Inventor： Scott L. Light ,  Dan Millward ,  Yuan He ,  Kaveri Jain ,  Lijing Gou ,  Zishu Zhang ,  Anton J. deVilliers ,  Michael D. Hyatt ,  Jianming Zhou

IPC: G03F7/20

CPC classification number: G03F7/70741 ,  G03F1/38 ,  G03F7/70433 ,  G03F7/70891

Abstract: A method of mitigating asymmetric lens heating in photolithographically patterning a photo-imageable material using a reticle includes determining where first hot spot locations are expected to occur on a lens when using a reticle to pattern a photo-imageable material. The reticle is then fabricated to include non-printing features within a non-printing region of the reticle which generate additional hot spot locations on the lens when using the reticle to pattern the photo-imageable material. Other implementations are contemplated, including reticles which may be independent of method of use or fabrication.

Abstract translation: 使用光掩模光刻地图案化可光成像材料的方法来减轻不对称透镜加热的方法包括当使用掩模版图案可光成像材料时，确定预期在透镜上将出现第一热点位置的位置。 然后制造掩模版以在掩模版的非印刷区域内包括非印刷特征，当使用掩模版对可光成像材料进行图案化时，其在透镜上产生额外的热点位置。 考虑了其他实施方式，包括可以独立于使用或制造方法的标线。

公开(公告)号：US20140342563A1

公开(公告)日：2014-11-20

申请号：US13893546

申请日：2013-05-14

Applicant: Micron Technology, Inc.

Inventor： Scott L. Light ,  Kyle Armstrong ,  Michael D. Hyatt ,  Vishal Sipani

IPC: H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/0337

Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.

Abstract translation: 在衬底上形成图案的方法包括形成从第一平版印刷图案化步骤导出的间隔开的第一特征。 侧壁间隔件形成在第一特征的相对侧上。 在形成侧壁间隔物之后，形成从第二平版印刷图案化步骤得到的隔开的第二特征。 第二特征中的至少一些个体在穿过第一和第二特征的至少一个直线垂直横截面中在第一特征之间横向间隔开并且横向间隔开。 在第二平版印刷图案化步骤之后，所有至少一个横截面中的所有侧壁间隔物都被去除。

公开(公告)号：US10217706B2

公开(公告)日：2019-02-26

申请号：US15685907

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

IPC: H01L23/525 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

公开(公告)号：US20170352616A1

公开(公告)日：2017-12-07

申请号：US15685907

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

IPC: H01L23/525 ,  H01L23/532 ,  H01L23/528 ,  H01L21/033 ,  H01L21/768

CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

公开(公告)号：US09048292B2

公开(公告)日：2015-06-02

申请号：US13660860

申请日：2012-10-25

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

IPC: H01L21/00 ,  H01L21/768 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

Abstract translation: 一些实施例包括形成导电线的方法。 光致抗蚀剂特征形成在衬底上，其中至少一个光致抗蚀剂特征具有变窄的区域。 修整光致抗蚀剂特征，其穿过狭窄区域以形成间隙。 隔板沿光致抗蚀剂特征的侧壁形成。 间隙中的两个垫片合并在一起。 去除光致抗蚀剂特征以留下包括间隔物的图案。 该图案延伸到衬底中以在衬底内形成多个凹槽。 导电材料形成在凹槽内以形成导电线。 一些实施例包括在半导体衬底上具有多条线的半导体结构。 两条线彼此相邻并且基本上彼此平行，除了在所述两条线彼此合并的区域中。

公开(公告)号：US20140117529A1

公开(公告)日：2014-05-01

申请号：US13660860

申请日：2012-10-25

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

IPC: H01L21/32 ,  H01L23/48 ,  H01L23/58 ,  H01L21/22 ,  H01L21/768

CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

Abstract translation: 一些实施例包括形成导电线的方法。 光致抗蚀剂特征形成在衬底上，其中至少一个光致抗蚀剂特征具有变窄的区域。 修整光致抗蚀剂特征，其穿过狭窄区域以形成间隙。 隔板沿光致抗蚀剂特征的侧壁形成。 间隙中的两个垫片合并在一起。 去除光致抗蚀剂特征以留下包括间隔物的图案。 该图案延伸到衬底中以在衬底内形成多个凹槽。 导电材料形成在凹槽内以形成导电线。 一些实施例包括在半导体衬底上具有多条线的半导体结构。 两条线彼此相邻并且基本上彼此平行，除了在所述两条线彼此合并的区域中。

公开(公告)号：US09780029B2

公开(公告)日：2017-10-03

申请号：US14699664

申请日：2015-04-29

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Kyle Armstrong ,  Michael D. Hyatt ,  Michael Dean Van Patten ,  David A. Kewley ,  Ming-Chuan Yang

IPC: H01L21/768 ,  H01L23/525 ,  H01L23/532 ,  H01L23/528 ,  H01L21/033

CPC classification number: H01L23/525 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.