公开(公告)号：US20150031171A1

公开(公告)日：2015-01-29

申请号：US14483510

申请日：2014-09-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Rickie C. Lake

IPC: H01L21/768 ,  H01L25/00

CPC classification number: H01L21/76898 ,  H01L21/486 ,  H01L21/76831 ,  H01L23/481 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2924/12044 ,  H01L2924/181 ,  Y10T156/10 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Methods of forming conductive elements on and in a substrate include forming a layer of conductive material over a surface of a substrate prior to forming a plurality of vias through the substrate from an opposing surface of the substrate to the layer of conductive material. In some embodiments, a temporary carrier may be secured to the layer of conductive material on a side thereof opposite the substrate prior to forming the vias. Structures, including workpieces formed using such methods, are also disclosed.

Abstract translation: 在衬底上和衬底中形成导电元件的方法包括在从衬底的相对表面到导电材料层形成穿过衬底的多个通孔之前，在衬底的表面上形成导电材料层。 在一些实施例中，临时载体可以在形成通孔之前固定到与衬底相对的一侧上的导电材料层。 还公开了包括使用这种方法形成的工件的结构。

公开(公告)号：US09153491B2

公开(公告)日：2015-10-06

申请号：US14483510

申请日：2014-09-11

Applicant: Micron Technology, Inc.

Inventor： Rickie C. Lake

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/48 ,  H01L25/00

CPC classification number: H01L21/76898 ,  H01L21/486 ,  H01L21/76831 ,  H01L23/481 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2924/12044 ,  H01L2924/181 ,  Y10T156/10 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Methods of forming conductive elements on and in a substrate include forming a layer of conductive material over a surface of a substrate prior to forming a plurality of vias through the substrate from an opposing surface of the substrate to the layer of conductive material. In some embodiments, a temporary carrier may be secured to the layer of conductive material on a side thereof opposite the substrate prior to forming the vias. Structures, including workpieces formed using such methods, are also disclosed.

Abstract translation: 在衬底上和衬底中形成导电元件的方法包括在从衬底的相对表面到导电材料层形成穿过衬底的多个通孔之前，在衬底的表面上形成导电材料层。 在一些实施例中，临时载体可以在形成通孔之前固定到与衬底相对的一侧上的导电材料层。 还公开了包括使用这种方法形成的工件的结构。

公开(公告)号：US09737947B2

公开(公告)日：2017-08-22

申请号：US14165030

申请日：2014-01-27

Applicant: Micron Technology, Inc.

Inventor： Warren M. Farnworth ,  Rickie C. Lake ,  William M. Hiatt

IPC: B23K35/14 ,  H01L29/40 ,  H01L23/48 ,  B23K1/20 ,  B23K1/00 ,  B23K35/22

CPC classification number: B23K1/20 ,  B23K1/0016 ,  B23K35/22 ,  H01L29/40 ,  H01L2224/05001 ,  H01L2224/11 ,  Y10T428/12493 ,  Y10T428/12708 ,  Y10T428/12889 ,  Y10T428/12896 ,  Y10T428/12903

Abstract: Microfeature workpieces having alloyed conductive structures, and associated methods are disclosed. A method in accordance with one embodiment includes applying a volume of material to a bond pad of a microfeature workpiece, with the volume of material including a first metallic constituent and the bond pad including a second constituent. The method can further include elevating a temperature of the volume of material while the volume of material is applied to the bond pad to alloy the first metallic constituent and the second metallic constituent so that the first metallic constituent is alloyed generally throughout the volume of material. A thickness of the bond pad can be reduced from an initial thickness T1 to a reduced thickness T2.

公开(公告)号：US20140284375A1

公开(公告)日：2014-09-25

申请号：US14165030

申请日：2014-01-27

Applicant: Micron Technology, Inc.

Inventor： Warren M. Farnworth ,  Rickie C. Lake ,  William M. Hiatt

IPC: B23K1/20

CPC classification number: B23K1/20 ,  B23K1/0016 ,  B23K35/22 ,  H01L29/40 ,  H01L2224/05001 ,  H01L2224/11 ,  Y10T428/12493 ,  Y10T428/12708 ,  Y10T428/12889 ,  Y10T428/12896 ,  Y10T428/12903

Abstract: Microfeature workpieces having alloyed conductive structures, and associated methods are disclosed. A method in accordance with one embodiment includes applying a volume of material to a bond pad of a microfeature workpiece, with the volume of material including a first metallic constituent and the bond pad including a second constituent. The method can further include elevating a temperature of the volume of material while the volume of material is applied to the bond pad to alloy the first metallic constituent and the second metallic constituent so that the first metallic constituent is alloyed generally throughout the volume of material. A thickness of the bond pad can be reduced from an initial thickness T1 to a reduced thickness T2.

Abstract translation: 公开了具有合金导电结构的微型工件和相关方法。 根据一个实施例的方法包括将一定体积的材料施加到微特征工件的接合焊盘，其中所述材料的体积包括第一金属成分，并且所述接合焊盘包括第二成分。 该方法还可以包括升高材料体积的温度，同时将材料的体积施加到接合垫以使第一金属构件和第二金属构件合金，使得第一金属构件通常在整个体积的材料中合金化。 接合焊盘的厚度可以从初始厚度T1减小到减小的厚度T2。