公开(公告)号：US20070105374A1

公开(公告)日：2007-05-10

申请号：US11270931

申请日：2005-11-10

申请人： Ming-Kwei Lee ,  Jung-Jie Huang ,  Yu-Hsiang Hung

发明人： Ming-Kwei Lee ,  Jung-Jie Huang ,  Yu-Hsiang Hung

IPC分类号： H01L21/44

CPC分类号： H01L21/02186 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02362 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/31604 ,  H01L21/31608 ,  H01L29/517

摘要： A method for making a MOS device includes: forming an insulator layer on a semiconductor substrate, the insulator layer including a titanium dioxide film that has a surface with hydroxyl groups formed thereon; and forming an aluminum cap film on the surface of the titanium dioxide film, and conducting annealing operation of the aluminum cap film at an annealing temperature sufficient to permit formation of active hydrogen atoms through reaction of the aluminum cap film and the hydroxyl groups, thereby enabling hydrogen passivation of oxide traps in the titanium dioxide film through diffusion of the active hydrogen atoms into the titanium dioxide film.

摘要翻译： 制造MOS器件的方法包括：在半导体衬底上形成绝缘体层，所述绝缘体层包括其上形成有羟基的表面的二氧化钛膜; 并在二氧化钛膜的表面上形成铝盖膜，并且在退火温度下进行铝盖膜的退火操作，该退火温度足以通过铝盖膜和羟基的反应形成活性氢原子，从而使能 通过将活性氢原子扩散到二氧化钛膜中，二氧化钛膜中的氧化物阱的氢钝化。

公开(公告)号：US07371668B2

公开(公告)日：2008-05-13

申请号：US11270931

申请日：2005-11-10

申请人： Ming-Kwei Lee ,  Jung-Jie Huang ,  Yu-Hsiang Hung

发明人： Ming-Kwei Lee ,  Jung-Jie Huang ,  Yu-Hsiang Hung

IPC分类号： H01L21/44 ,  H01L21/28

CPC分类号： H01L21/02186 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02362 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/31604 ,  H01L21/31608 ,  H01L29/517

摘要： A method for making a MOS device includes: forming an insulator layer on a semiconductor substrate, the insulator layer including a titanium dioxide film that has a surface with hydroxyl groups formed thereon; and forming an aluminum cap film on the surface of the titanium dioxide film, and conducting annealing operation of the aluminum cap film at an annealing temperature sufficient to permit formation of active hydrogen atoms through reaction of the aluminum cap film and the hydroxyl groups, thereby enabling hydrogen passivation of oxide traps in the titanium dioxide film through diffusion of the active hydrogen atoms into the titanium dioxide film.

摘要翻译： 制造MOS器件的方法包括：在半导体衬底上形成绝缘体层，所述绝缘体层包括其上形成有羟基的表面的二氧化钛膜; 并在二氧化钛膜的表面上形成铝盖膜，并且在退火温度下进行铝盖膜的退火操作，该退火温度足以通过铝盖膜和羟基的反应形成活性氢原子，从而使能 通过将活性氢原子扩散到二氧化钛膜中，二氧化钛膜中的氧化物阱的氢钝化。

公开(公告)号：US08772120B2

公开(公告)日：2014-07-08

申请号：US13479279

申请日：2012-05-24

申请人： Chung-Fu Chang ,  Yu-Hsiang Hung ,  Shin-Chuan Huang ,  Chia-Jong Liu ,  Yen-Liang Wu ,  Pei-Yu Chou

发明人： Chung-Fu Chang ,  Yu-Hsiang Hung ,  Shin-Chuan Huang ,  Chia-Jong Liu ,  Yen-Liang Wu ,  Pei-Yu Chou

IPC分类号： H01L21/336

CPC分类号： H01L21/823425 ,  H01L21/823412 ,  H01L21/823468 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864

摘要： A semiconductor process includes the following steps. A gate structure is formed on a substrate. A main spacer is formed on the substrate beside the gate structure. A source/drain is formed in the substrate beside the main spacer. After the source/drain is formed, an epitaxial structure is formed in the substrate beside the main spacer. A gate structure may be respectively formed in a first area and a second area of a substrate. A main spacer is formed on the substrate respectively beside the two gate structures. A source/drain is formed in the substrate respectively beside the two spacers. After the two source/drains are formed, an epitaxial structure is formed in the substrate respectively beside the main spacers.

摘要翻译： 半导体工艺包括以下步骤。 在基板上形成栅极结构。 在栅极结构旁边的基板上形成主间隔物。 源极/漏极形成在主间隔物旁边的衬底中。 在形成源极/漏极之后，在主间隔物旁边的衬底中形成外延结构。 栅极结构可以分别形成在衬底的第一区域和第二区域中。 在衬底上分别在两个栅极结构旁边形成主间隔物。 源极/漏极分别在两个间隔物的旁边的衬底中形成。 在形成两个源极/漏极之后，在主衬垫的旁边分别在衬底中形成外延结构。

公开(公告)号：US20130089962A1

公开(公告)日：2013-04-11

申请号：US13270240

申请日：2011-10-11

申请人： Chung-Fu Chang ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Chia-Jong Liu ,  Pei-Yu Chou ,  Jyh-Shyang Jenq ,  Ling-Chun Chou ,  I-Chang Wang ,  Ching-Wen Hung ,  Ted Ming-Lang Guo ,  Chun-Yuan Wu

发明人： Chung-Fu Chang ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Chia-Jong Liu ,  Pei-Yu Chou ,  Jyh-Shyang Jenq ,  Ling-Chun Chou ,  I-Chang Wang ,  Ching-Wen Hung ,  Ted Ming-Lang Guo ,  Chun-Yuan Wu

IPC分类号： H01L21/336

CPC分类号： H01L29/6656 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7834

摘要： A semiconductor process includes the following steps. A substrate is provided. A gate structure is formed on the substrate. A spacer is formed on the substrate beside the gate structure. The spacer includes a first spacer and a second spacer located on the external surface of the first spacer. A first etching process is performed to etch and form at least a recess in the substrate beside the spacer and entirely remove the second spacer. The etching rate of the first etching process to the first spacer is lower than the etching rate of the first etching process to the second spacer. An epitaxial layer is formed in the recess.

摘要翻译： 半导体工艺包括以下步骤。 提供基板。 栅极结构形成在衬底上。 在栅极结构旁边的衬底上形成间隔物。 间隔件包括第一间隔件和位于第一间隔件的外表面上的第二间隔件。 执行第一蚀刻工艺以蚀刻并在衬垫旁边的至少一个衬底中形成凹槽，并且完全除去第二间隔物。 第一蚀刻工艺对第一间隔物的蚀刻速率低于第一蚀刻工艺对第二间隔物的蚀刻速率。 在凹部中形成外延层。

公开(公告)号：US09136348B2

公开(公告)日：2015-09-15

申请号：US13417337

申请日：2012-03-12

申请人： Ming-Te Wei ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Po-Chao Tsao ,  Chia-Jui Liang ,  Ming-Tsung Chen ,  Chia-Wen Liang

发明人： Ming-Te Wei ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Po-Chao Tsao ,  Chia-Jui Liang ,  Ming-Tsung Chen ,  Chia-Wen Liang

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/165

CPC分类号： H01L29/66492 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the gate structure, a doped epitaxial material filling up the recess, a cap layer including an undoped epitaxial material and disposed on the doped epitaxial material, a lightly doped drain disposed below the cap layer and sandwiched between the doped epitaxial material and the cap layer, and a silicide disposed on the cap layer and covering the doped epitaxial material to cover the cap layer together with the outer spacer without directly contacting the lightly doped drain.

摘要翻译： 半导体结构包括设置在基板上并具有外部间隔件的栅极结构，设置在基板中并与栅极结构相邻的凹槽，填充凹部的掺杂的外延材料，包括未掺杂的外延材料的盖层， 所述掺杂的外延材料是设置在所述覆盖层下方并且夹在所述掺杂的外延材料和所述覆盖层之间的轻掺杂漏极，以及设置在所述覆盖层上并覆盖所述掺杂外延材料以与所述外部间隔物一起覆盖所述覆盖层的硅化物 而不直接接触轻掺杂的漏极。

公开(公告)号：US20130234261A1

公开(公告)日：2013-09-12

申请号：US13417337

申请日：2012-03-12

申请人： Ming-Te Wei ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Po-Chao Tsao ,  Chia-Jui Liang ,  Ming-Tsung Chen ,  Chia-Wen Liang

发明人： Ming-Te Wei ,  Shin-Chuan Huang ,  Yu-Hsiang Hung ,  Po-Chao Tsao ,  Chia-Jui Liang ,  Ming-Tsung Chen ,  Chia-Wen Liang

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66492 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the gate structure, a doped epitaxial material filling up the recess, a cap layer including an undoped epitaxial material and disposed on the doped epitaxial material, a lightly doped drain disposed below the cap layer and sandwiched between the doped epitaxial material and the cap layer, and a silicide disposed on the cap layer and covering the doped epitaxial material to cover the cap layer together with the outer spacer without directly contacting the lightly doped drain.

公开(公告)号：US08431460B2

公开(公告)日：2013-04-30

申请号：US13117518

申请日：2011-05-27

申请人： Shin-Chuan Huang ,  Guang-Yaw Hwang ,  Hsiang-Ying Wang ,  Yu-Hsiang Hung ,  I-Chang Wang

发明人： Shin-Chuan Huang ,  Guang-Yaw Hwang ,  Hsiang-Ying Wang ,  Yu-Hsiang Hung ,  I-Chang Wang

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834

摘要： A semiconductor device comprising a silicon substrate, a gate structure and a heteroatom-containing epitaxial structure is provided. The gate structure is disposed on a surface of the silicon substrate. The heteroatom-containing epitaxial structure is disposed adjacent to the gate structure and has a major portion and an extension portion, wherein the major portion virtual vertically extends downwards into the silicon substrate from the surface; and the extension portion further extends downwards into the silicon substrate with a tapered cross-section continuing with the major portion.

摘要翻译： 提供包括硅衬底，栅极结构和含杂原子的外延结构的半导体器件。 栅极结构设置在硅衬底的表面上。 含杂原子的外延结构设置成与栅极结构相邻并且具有主要部分和延伸部分，其中主要部分虚拟地从表面向下垂直延伸到硅衬底中; 并且延伸部分进一步向下延伸到具有与主要部分连续的锥形横截面的硅衬底中。

公开(公告)号：US20130316506A1

公开(公告)日：2013-11-28

申请号：US13479279

申请日：2012-05-24

申请人： Chung-Fu Chang ,  Yu-Hsiang Hung ,  Shin-Chuan Huang ,  Chia-Jong Liu ,  Yen-Liang Wu ,  Pei-Yu Chou

发明人： Chung-Fu Chang ,  Yu-Hsiang Hung ,  Shin-Chuan Huang ,  Chia-Jong Liu ,  Yen-Liang Wu ,  Pei-Yu Chou

IPC分类号： H01L21/336

CPC分类号： H01L21/823425 ,  H01L21/823412 ,  H01L21/823468 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864

摘要： A semiconductor process includes the following steps. A gate structure is formed on a substrate. A main spacer is formed on the substrate beside the gate structure. A source/drain is formed in the substrate beside the main spacer. After the source/drain is formed, an epitaxial structure is formed in the substrate beside the main spacer. A gate structure may be respectively formed in a first area and a second area of a substrate. A main spacer is formed on the substrate respectively beside the two gate structures. A source/drain is formed in the substrate respectively beside the two spacers. After the two source/drains are formed, an epitaxial structure is formed in the substrate respectively beside the main spacers.

摘要翻译： 半导体工艺包括以下步骤。 在基板上形成栅极结构。 在栅极结构旁边的基板上形成主间隔物。 源极/漏极形成在主间隔物旁边的衬底中。 在形成源极/漏极之后，在主间隔物旁边的衬底中形成外延结构。 栅极结构可以分别形成在衬底的第一区域和第二区域中。 在衬底上分别在两个栅极结构旁边形成主间隔物。 源极/漏极分别在两个间隔物的旁边的衬底中形成。 在形成两个源极/漏极之后，在主衬垫的旁边分别在衬底中形成外延结构。

公开(公告)号：US20120299058A1

公开(公告)日：2012-11-29

申请号：US13117518

申请日：2011-05-27

申请人： Shin-Chuan Huang ,  Guang-Yaw Hwang ,  Hsiang-Ying Wang ,  Yu-Hsiang Hung ,  I-Chang Wang

发明人： Shin-Chuan Huang ,  Guang-Yaw Hwang ,  Hsiang-Ying Wang ,  Yu-Hsiang Hung ,  I-Chang Wang

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834

摘要： A semiconductor device comprising a silicon substrate, a gate structure and a heteroatom-containing epitaxial structure is provided. The gate structure is disposed on a surface of the silicon substrate. The heteroatom-containing epitaxial structure is disposed adjacent to the gate structure and has a major portion and an extension portion, wherein the major portion virtual vertically extends downwards into the silicon substrate from the surface; and the extension portion further extends downwards into the silicon substrate with a tapered cross-section continuing with the major portion.

摘要翻译： 提供包括硅衬底，栅极结构和含杂原子的外延结构的半导体器件。 栅极结构设置在硅衬底的表面上。 含杂原子的外延结构设置成与栅极结构相邻并且具有主要部分和延伸部分，其中主要部分虚拟地从表面向下垂直延伸到硅衬底中; 并且延伸部分进一步向下延伸到具有与主要部分连续的锥形横截面的硅衬底中。