公开(公告)号：US20110059575A1

公开(公告)日：2011-03-10

申请号：US12871122

申请日：2010-08-30

Applicant: Masashi TSUBUKU ,  Shuhei YOSHITOMI ,  Takahiro TUJI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroyuki TOMATSU ,  Masahiko HAYAKAWA

Inventor： Masashi TSUBUKU ,  Shuhei YOSHITOMI ,  Takahiro TUJI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroyuki TOMATSU ,  Masahiko HAYAKAWA

IPC: H01L21/34

CPC classification number: H01L27/1262 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02631 ,  H01L21/02667 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

Abstract translation: 本发明的目的是提供一种包括氧化物半导体膜的薄膜晶体管的结构的制造方法，其中形成沟道的阈值电压为正且尽可能接近0V。 形成保护绝缘层以覆盖包括通过第一热处理脱水或脱氢的氧化物半导体层的薄膜晶体管，以及在比第一热处理低的温度下进行第二热处理，其中， 重复多次温度的降低，由此，在不影响通道长度的情况下，包含氧化物半导体层的薄膜晶体管，其中形成沟道的阈值电压为正且尽可能接近0V，可以 制造。

公开(公告)号：US20110031492A1

公开(公告)日：2011-02-10

申请号：US12848389

申请日：2010-08-02

Applicant: Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Miyuki HOSOBA ,  Tatsuya TAKAHASHI

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Miyuki HOSOBA ,  Tatsuya TAKAHASHI

IPC: H01L29/786 ,  H01L21/44

CPC classification number: H01L27/3262 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/32 ,  H01L27/3248 ,  H01L29/45

Abstract: The semiconductor device includes a driver circuit including a first thin film transistor and a pixel including a second thin film transistor over one substrate. The first thin film transistor includes a first gate electrode layer, a gate insulating layer, a first oxide semiconductor layer, a first oxide conductive layer, a second oxide conductive layer, an oxide insulating layer which is in contact with part of the first oxide semiconductor layer and which is in contact with peripheries and side surfaces of the first and second oxide conductive layers, a first source electrode layer, and a first drain electrode layer. The second thin film transistor includes a second gate electrode layer, a second oxide semiconductor layer, and a second source electrode layer and a second drain electrode layer each formed using a light-transmitting material.

Abstract translation: 半导体器件包括驱动电路，该驱动电路包括第一薄膜晶体管和在一个衬底上包括第二薄膜晶体管的像素。 第一薄膜晶体管包括第一栅极电极层，栅极绝缘层，第一氧化物半导体层，第一氧化物导电层，第二氧化物导电层，与第一氧化物半导体的一部分接触的氧化物绝缘层 并且与第一和第二氧化物导电层的周边和侧表面接触，第一源极电极层和第一漏极电极层。 第二薄膜晶体管包括使用透光材料形成的第二栅极电极层，第二氧化物半导体层以及第二源电极层和第二漏极电极层。

公开(公告)号：US20110024740A1

公开(公告)日：2011-02-03

申请号：US12846572

申请日：2010-07-29

Applicant: Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Junichiro SAKATA

Inventor： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Junichiro SAKATA

IPC: H01L29/786 ,  H01L21/44

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/7869

Abstract: A semiconductor device having a structure which enables sufficient reduction in parasitic capacitance is provided. In addition, the operation speed of thin film transistors in a driver circuit is improved. In a bottom-gate thin film transistor in which an oxide insulating layer is in contact with a channel formation region in an oxide semiconductor layer, a source electrode layer and a drain electrode layer are formed in such a manner that they do not overlap with a gate electrode layer. Thus, the distance between the gate electrode layer and the source electrode layer and between the gate electrode layer and the drain electrode layer are increased; accordingly, parasitic capacitance can be reduced.

Abstract translation: 提供具有能够充分降低寄生电容的结构的半导体器件。 此外，提高了驱动电路中薄膜晶体管的操作速度。 在其中氧化物绝缘层与氧化物半导体层中的沟道形成区域接触的底栅极薄膜晶体管中，以与栅极薄膜晶体管不重叠的方式形成源电极层和漏电极层， 栅电极层。 因此，栅极电极层与源电极层之间以及栅极电极层和漏极电极层之间的距离增加; 因此，可以减小寄生电容。

公开(公告)号：US20120286266A1

公开(公告)日：2012-11-15

申请号：US13555579

申请日：2012-07-23

Applicant: Hideomi SUZAWA ,  Shinya SASAGAWA ,  Taiga MURAOKA ,  Shunichi ITO ,  Miyuki HOSOBA

Inventor： Hideomi SUZAWA ,  Shinya SASAGAWA ,  Taiga MURAOKA ,  Shunichi ITO ,  Miyuki HOSOBA

IPC: H01L29/26

CPC classification number: H01L29/66969 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66742 ,  H01L29/78621 ,  H01L29/7869

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.

Abstract translation: 本发明的目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在包括通道蚀刻的半导体器件的制造方法中 倒置交错薄膜晶体管，氧化物半导体膜和导电膜使用掩模层进行蚀刻，该掩模层使用作为透光的多色调掩模形成，该透光掩模通过该曝光掩模透射，以便具有多个 强度 在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

公开(公告)号：US20120220078A1

公开(公告)日：2012-08-30

申请号：US13467408

申请日：2012-05-09

Applicant: Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroki OHARA ,  Shunpei YAMAZAKI

Inventor： Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroki OHARA ,  Shunpei YAMAZAKI

IPC: H01L21/363

CPC classification number: H01L29/78696 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/133302 ,  G02F2001/133531 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L21/02107 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/02672 ,  H01L21/324 ,  H01L21/477 ,  H01L21/67115 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/66969 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to −40° C., still preferably lower than or equal to −50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.

Abstract translation: 目的在于提供一种使用氧化物半导体的具有稳定电特性的半导体器件。 在氮气或惰性气体气氛（例如氩气或氦气）或减压下对氧化物半导体层进行脱水或脱氢处理的热处理，并进行用于在 氧气和氮气气氛或空气（露点优选低于或等于-40℃，更优选低于或等于-50℃）气氛。 因此，氧化物半导体层被高度纯化，从而形成i型氧化物半导体层。 制造包括具有氧化物半导体层的薄膜晶体管的半导体器件。

公开(公告)号：US20120126232A1

公开(公告)日：2012-05-24

申请号：US13363405

申请日：2012-02-01

Applicant: Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Abstract translation: 本发明的目的是提供具有优异显示特性的显示装置，其中使用具有对应于各个电路的特性的不同结构的晶体管形成设置在一个基板上的像素电路和驱动电路。 驱动器电路部分包括驱动电路晶体管，其中使用金属膜形成栅电极层，源电极层和漏电极层，并且使用氧化物半导体形成沟道层。 像素部分包括其中使用氧化物导体形成栅电极层，源电极层和漏电极层的像素晶体管，并且使用氧化物半导体形成半导体层。 像素晶体管使用透光材料形成，因此可以制造具有较高开口率的显示装置。

公开(公告)号：US20110058116A1

公开(公告)日：2011-03-10

申请号：US12871162

申请日：2010-08-30

Applicant: Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Yoshiaki OIKAWA

Inventor： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Yoshiaki OIKAWA

IPC: H01L33/08 ,  H01L33/28

CPC classification number: H01L27/1225

Abstract: An object is to provide an active matrix liquid crystal display device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors are provided corresponding to characteristics of the plural kinds of circuits. An inverted-coplanar thin film transistor including an oxide semiconductor layer which is over and overlaps with a source electrode layer and a drain electrode layer is used for a pixel thin film transistor. A channel-protective thin film transistor is used for a driver-circuit thin film transistor is used. In addition, main parts of the pixel thin film transistor are formed using a light-transmitting material, so that the aperture ratio is increased.

Abstract translation: 本发明提供一种有源矩阵液晶显示装置，其中在一个基板上形成多种电路，并且根据多种电路的特性设置多种薄膜晶体管。 包括与源电极层和漏电极层重叠的氧化物半导体层的倒共面薄膜晶体管用于像素薄膜晶体管。 使用通道保护薄膜晶体管用于驱动电路薄膜晶体管。 此外，使用透光材料形成像素薄膜晶体管的主要部分，使得开口率增加。

公开(公告)号：US20110057187A1

公开(公告)日：2011-03-10

申请号：US12871184

申请日：2010-08-30

Applicant: Masayuki SAKAKURA ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA

Inventor： Masayuki SAKAKURA ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA

IPC: H01L33/00 ,  H01L21/02

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/322 ,  H01L27/3262

Abstract: An object of the present invention is to provide a light-emitting device in which plural kinds of circuits are formed over the same substrate, and plural kinds of thin film transistors are provided in accordance with characteristics of the plural kinds of circuits. An inverted-coplanar thin film transistor, an oxide semiconductor layer of which overlaps with a source and drain electrode layers, and a channel-etched thin film transistor are used as a thin film transistor for a pixel and a thin film transistor for a driver circuit, respectively. Between the thin film transistor for a pixel and a light-emitting element, a color filter layer is provided so as to overlap with the light-emitting element which is electrically connected to the thin film transistor for a pixel.

Abstract translation: 本发明的目的是提供一种在同一基板上形成多种电路的发光器件，并且根据多种电路的特性提供多种薄膜晶体管。 作为用于像素的薄膜晶体管和用于驱动电路的薄膜晶体管，使用反向共面薄膜晶体管，其与源极和漏极层重叠的氧化物半导体层和沟道蚀刻薄膜晶体管 ， 分别。 在用于像素的薄膜晶体管和发光元件之间，设置滤色器层，以与与像素的薄膜晶体管电连接的发光元件重叠。

公开(公告)号：US20110031496A1

公开(公告)日：2011-02-10

申请号：US12848375

申请日：2010-08-02

Applicant: Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Yoshiaki OIKAWA

Inventor： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Yoshiaki OIKAWA

IPC: H01L33/02 ,  H01L33/00 ,  H01L33/44

CPC classification number: H01L27/3262 ,  H01L27/1225 ,  H01L27/322 ,  H01L27/3248 ,  H01L51/5278 ,  H01L2251/5323

Abstract: A light-emitting device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors in accordance with characteristics of the plural kinds of circuits are included. An inverted-coplanar thin film transistor including an oxide semiconductor layer which overlaps a source and drain electrode layers is used as a thin film transistor for a pixel, a channel-stop thin film transistor is used as a thin film transistor for a driver circuit, and a color filter layer is provided between the thin film transistor for a pixel and a light-emitting element so as to overlap the light-emitting element which is electrically connected to the thin film transistor for a pixel.

Abstract translation: 包括根据多种电路的特性，在一个基板上形成多种电路的多个薄膜晶体管的发光器件。 包括与源极和漏极层重叠的氧化物半导体层的倒共面薄膜晶体管用作像素的薄膜晶体管，通道停止薄膜晶体管用作用于驱动电路的薄膜晶体管， 并且在用于像素的薄膜晶体管和发光元件之间设置滤色器层，以与与像素的薄膜晶体管电连接的发光元件重叠。

公开(公告)号：US20110031491A1

公开(公告)日：2011-02-10

申请号：US12846603

申请日：2010-07-29

Applicant: Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hideaki KUWABARA

Inventor： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L21/34

CPC classification number: H01L29/78606 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1345 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/13606 ,  G02F2201/123 ,  G09G3/344 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/3262 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

Abstract translation: 目的在于提供一种半导体器件，其具有可以有效地减少布线之间的寄生电容的结构。 在使用氧化物半导体层的底栅薄膜晶体管中，用作沟道保护层的氧化物绝缘层形成在与栅电极层重叠的氧化物半导体层的一部分上方并与其形成接触，同时氧化物 形成覆盖层叠氧化物半导体层的周边部（包括侧面）的绝缘层。 此外，以与沟道保护层不重叠的方式形成源极电极层和漏极电极层。 因此，提供了源极电极层和漏电极层上的绝缘层与氧化物半导体层接触的结构。