公开(公告)号：US20090143999A1

公开(公告)日：2009-06-04

申请号：US11950123

申请日：2007-12-04

申请人： Muthukumarasamy Karthikeyan ,  Louis V. Medina ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Muthukumarasamy Karthikeyan ,  Louis V. Medina ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  G06F19/00

CPC分类号： G01R31/2894 ,  G01R31/2886 ,  G01R35/005

摘要： A system and a method for effectively determining the measurement sensitivity, repeatability, and probe commonality to assist a test engineer determine if the tester meets the specified resolution at every test. A statistical measurement of inherent tester specifications are provided with the added accumulation of the probe contact resistance during the probing process. It further provides a feedback to the test probe card noise level while testing is in progress. Moreover, the system and the method determine the test probing integrity in-situ when testing integrated circuit chips or wafers, dynamically detecting probing errors, and modifying data associated with defective test probes.

摘要翻译： 一种用于有效确定测量灵敏度，重复性和探头共性以帮助测试工程师确定测试仪是否在每次测试时满足指定分辨率的系统和方法。 在探测过程中，增加了探针接触电阻的积累，对固有的测试仪规格进行统计测量。 它进一步提供测试探针卡噪声水平的反馈。 此外，系统和方法在测试集成电路芯片或晶圆时动态地检测探测误差以及修改与有缺陷的测试探针有关的数据，从而在现场确定测试探测完整性。

公开(公告)号：US07856332B2

公开(公告)日：2010-12-21

申请号：US11950123

申请日：2007-12-04

申请人： Muthukumarasamy Karthikeyan ,  Louis V. Medina ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Muthukumarasamy Karthikeyan ,  Louis V. Medina ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： G01R31/02 ,  G01R31/00 ,  G06F19/00 ,  G06F17/40

CPC分类号： G01R31/2894 ,  G01R31/2886 ,  G01R35/005

摘要： A system and a method for effectively determining the measurement sensitivity, repeatability, and probe commonality to assist a test engineer determine if the tester meets the specified resolution at every test. A statistical measurement of inherent tester specifications are provided with the added accumulation of the probe contact resistance during the probing process. It further provides a feedback to the test probe card noise level while testing is in progress. Moreover, the system and the method determine the test probing integrity in-situ when testing integrated circuit chips or wafers, dynamically detecting probing errors, and modifying data associated with defective test probes.

摘要翻译： 一种用于有效确定测量灵敏度，重复性和探头共性以帮助测试工程师确定测试仪是否在每次测试时满足指定分辨率的系统和方法。 在探测过程中，增加了探针接触电阻的积累，对固有的测试仪规格进行统计测量。 它进一步提供测试探针卡噪声水平的反馈。 此外，系统和方法在测试集成电路芯片或晶圆时动态地检测探测误差以及修改与有缺陷的测试探针有关的数据，从而在现场确定测试探测完整性。

公开(公告)号：US08159247B2

公开(公告)日：2012-04-17

申请号：US12574264

申请日：2009-10-06

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/20

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US09151781B2

公开(公告)日：2015-10-06

申请号：US13397781

申请日：2012-02-16

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/58 ,  G01R1/073 ,  H01L21/66 ,  H01L25/00

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US20110080189A1

公开(公告)日：2011-04-07

申请号：US12574264

申请日：2009-10-06

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/00 ,  G01R31/02

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US20120146682A1

公开(公告)日：2012-06-14

申请号：US13397781

申请日：2012-02-16

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/58

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US08759152B2

公开(公告)日：2014-06-24

申请号：US13489596

申请日：2012-06-06

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L21/00

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。

公开(公告)号：US20120241977A1

公开(公告)日：2012-09-27

申请号：US13489596

申请日：2012-06-06

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L25/00 ,  H01L21/66 ,  H05K13/00 ,  H01L21/60

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。

公开(公告)号：US20110115082A1

公开(公告)日：2011-05-19

申请号：US12619002

申请日：2009-11-16

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L23/48 ,  H01L21/66 ,  H01L21/768

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。

公开(公告)号：US08237278B2

公开(公告)日：2012-08-07

申请号：US12619002

申请日：2009-11-16

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。