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公开(公告)号:US12165009B2
公开(公告)日:2024-12-10
申请号:US17603517
申请日:2020-04-14
Inventor: Hitoshi Kubota , Shingo Tamaru , Akio Fukushima , Takahiro Mori , Takashi Matsukawa
Abstract: The present invention addresses the problem of providing a quantum bit cell and a quantum bit integrated circuit having an easy-to-integrate structure. The quantum bit cell of the present invention including a spin torque oscillator capable of emitting a microwave with a propagation distance of 1 μm or less and having a maximum diameter of 1 μm or less, and a solid-state element quantum bit arranged near the spin torque oscillator at an interval of the propagation distance or less, where a quantum two-level system is controlled by the microwave.
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2.
公开(公告)号:US20240186404A1
公开(公告)日:2024-06-06
申请号:US18553693
申请日:2022-03-04
Inventor: Kimihiko Kato , Takahiro Mori , Shota Iizuka , Takashi Nakayama , Sanghun Cho , Jyurai Kato
IPC: H01L29/739 , H01L29/161 , H01L29/66 , H01L29/786
CPC classification number: H01L29/7391 , H01L29/161 , H01L29/66356 , H01L29/786
Abstract: An object of the present invention is to provide a semiconductor element capable of being manufactured in small size, easily and at a low cost and obtaining a large on-current, a semiconductor integrated circuit, and a production method for the semiconductor element.
A semiconductor element 10 has an element structure of a tunnel field-effect transistor. A channel part 13 formed of an indirect transition-type semiconductor is formed as a plate-like shaped portion having one end connected to a source part 14 and the other end connected to a drain part 15. Of two pairs of opposing surfaces of first opposing surfaces and second opposing surfaces which constitute the channel part 13 and are opposed in a direction perpendicular to the direction in which a current flows from the source part 14 to the drain part 15, at least one pair of the opposing surfaces selected from the two pairs is formed by arranging at a facing interval of 15 nm at the longest between the opposing surfaces, electron confinement surfaces in which a band structure of a direct transition-type semiconductor is capable of being simulatively given to the indirect transition-type semiconductor by regulation of electron motion.-
公开(公告)号:US20230200261A1
公开(公告)日:2023-06-22
申请号:US18071173
申请日:2022-11-29
Inventor: Shota Iizuka , Takahiro Mori , Kimihiko Kato , Atsushi Yagishita , Tetsuya Ueda
CPC classification number: H10N60/80 , H10N60/11 , H10N60/128 , H10N69/00
Abstract: The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device. The spin qubit-type semiconductor device includes a body comprised of at least one of a semiconductor layer itself formed with a quantum dot and a structural portion arranged around the semiconductor layer, a gate electrode arranged at a position on the semiconductor layer, which faces the quantum dot, at least one micro magnet wholly or partly embedded in the body so that a first position condition in which the micro magnet is at a position near the quantum dot, a second position condition in which the position of a lower end of the micro magnet is located below the gate electrode, and a third position condition in which when viewed from above the body, the micro magnet is arranged at a position having no rotational symmetry with the quantum dot as the center of rotation are satisfied, and a static magnetic field applying unit capable of applying a static magnetic field to the quantum dot and the micro magnet.
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公开(公告)号:US20230180633A1
公开(公告)日:2023-06-08
申请号:US17924037
申请日:2021-04-14
Inventor: Takahiro Mori , Atsushi Yagishita
CPC classification number: H10N60/128 , H10N60/11 , H10N60/01
Abstract: To suppress a leakage current caused by a gate of a tunnel field effect transistor included in a silicon spin quantum bit device, the silicon spin quantum bit device is provided including a tunnel field effect transistor having a gate, a source, and a drain, a quantum gate operation mechanism for spin control, which is provided under the tunnel field effect transistor, and an inter-qubit coupler for coupling a channel of the tunnel field effect transistor with a channel of a tunnel field effect transistor included in another quantum bit device. Further, the gate is made wider in width than the channel and is partly formed on the inter-qubit coupler.
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公开(公告)号:US20210013316A1
公开(公告)日:2021-01-14
申请号:US16982924
申请日:2019-03-22
Inventor: Hidehiro Asai , Takahiro Mori
IPC: H01L29/423 , H01L29/786 , H01L29/66
Abstract: [Problem] To improve the drain current ON/OFF ratio characteristics.
[Solution] A tunnel field-effect transistor 10 of the present invention is such that, when the gate length is denoted by LG and the extension distance of a source region 1 extended toward a drain region 3 from a position in the source region 1 is denoted by LOV, LTG expressed in Formula (1) below as the shortest distance between the position of an extension end of the source region 1 based on a drain-side reference position as the side face position of a gate electrode 6a, 6b closest to the drain region 3, and the position in the semiconductor layer 4 opposite to the drain-side reference position in the height direction of the gate electrode 6a, 6b satisfies a condition of Inequality (2) below. Note that lt_OFF in Inequality (2) denotes a shortest tunnel distance over which carriers move from the source region to a channel region through a tunnel junction surface in an OFF state of the tunnel field-effect transistor.-
6.
公开(公告)号:US10361193B2
公开(公告)日:2019-07-23
申请号:US15125263
申请日:2015-02-20
Inventor: Takahiro Mori
IPC: H01L27/088 , H01L21/265 , H01L29/417 , H01L27/12 , H01L21/8234 , H01L21/84
Abstract: The present invention provides an integrated circuit formed of tunneling field-effect transistors that includes a first tunneling field-effect transistor in which one of a first P-type region and a first N-type region operates as a source region and the other one operates as a drain region; and a second tunneling field-effect transistor in which one of a second P-type region and a second N-type region operates as a source region and the other one operates as a drain region, the first and second tunneling field-effect transistors being formed in one active region to have the same polarity, the first P-type region and the second N-type region being formed adjacently, the adjacent first P-type region and second N-type region being electrically connected through metal semiconductor alloy film.
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公开(公告)号:US20220222564A1
公开(公告)日:2022-07-14
申请号:US17603517
申请日:2020-04-14
Inventor: Hitoshi Kubota , Shingo Tamaru , Akio Fukushima , Takahiro Mori , Takashi Matsukawa
Abstract: The present invention addresses the problem of providing a quantum bit cell and a quantum bit integrated circuit having an easy-to-integrate structure. The quantum bit cell of the present invention including a spin torque oscillator capable of emitting a microwave with a propagation distance of 1 μm or less and having a maximum diameter of 1 μm or less, and a solid-state element quantum bit arranged near the spin torque oscillator at an interval of the propagation distance or less, where a quantum two-level system is controlled by the microwave.
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公开(公告)号:US11233131B2
公开(公告)日:2022-01-25
申请号:US16982924
申请日:2019-03-22
Inventor: Hidehiro Asai , Takahiro Mori
IPC: H01L29/423 , H01L29/786 , H01L29/66 , H01L29/08
Abstract: [Problem] To improve the drain current ON/OFF ratio characteristics.
[Solution] A tunnel field-effect transistor 10 of the present invention is such that, when the gate length is denoted by LG and the extension distance of a source region 1 extended toward a drain region 3 from a position in the source region 1 is denoted by LOV, LTG expressed in Formula (1) below as the shortest distance between the position of an extension end of the source region 1 based on a drain-side reference position as the side face position of a gate electrode 6a, 6b closest to the drain region 3, and the position in the semiconductor layer 4 opposite to the drain-side reference position in the height direction of the gate electrode 6a, 6b satisfies a condition of Inequality (2) below. Note that lt_OFF in Inequality (2) denotes a shortest tunnel distance over which carriers move from the source region to a channel region through a tunnel junction surface in an OFF state of the tunnel field-effect transistor.-
9.
公开(公告)号:US09711597B2
公开(公告)日:2017-07-18
申请号:US14915546
申请日:2014-07-30
Inventor: Takahiro Mori
IPC: H01L33/42 , H01L29/10 , H01L29/739 , H01L21/02 , H01L29/161 , H01L29/167 , H01L29/66 , H01L29/78
CPC classification number: H01L29/1033 , H01L21/02532 , H01L29/161 , H01L29/167 , H01L29/66568 , H01L29/7391 , H01L29/78
Abstract: The present invention provides a semiconductor element that can be manufactured easily at a low cost, can obtain a high tunneling current, and has an excellent operating characteristic, a method for manufacturing the same, and a semiconductor integrated circuit including the semiconductor element. The semiconductor element of the present invention is characterized in that the whole or a part of a tunnel junction is constituted by a semiconductor region made of an indirect-transition semiconductor containing isoelectronic-trap-forming impurities.
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