SEMICONDUCTOR ELEMENT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND PRODUCTION METHOD FOR SEMICONDUCTOR ELEMENT

    公开(公告)号:US20240186404A1

    公开(公告)日:2024-06-06

    申请号:US18553693

    申请日:2022-03-04

    CPC classification number: H01L29/7391 H01L29/161 H01L29/66356 H01L29/786

    Abstract: An object of the present invention is to provide a semiconductor element capable of being manufactured in small size, easily and at a low cost and obtaining a large on-current, a semiconductor integrated circuit, and a production method for the semiconductor element.
    A semiconductor element 10 has an element structure of a tunnel field-effect transistor. A channel part 13 formed of an indirect transition-type semiconductor is formed as a plate-like shaped portion having one end connected to a source part 14 and the other end connected to a drain part 15. Of two pairs of opposing surfaces of first opposing surfaces and second opposing surfaces which constitute the channel part 13 and are opposed in a direction perpendicular to the direction in which a current flows from the source part 14 to the drain part 15, at least one pair of the opposing surfaces selected from the two pairs is formed by arranging at a facing interval of 15 nm at the longest between the opposing surfaces, electron confinement surfaces in which a band structure of a direct transition-type semiconductor is capable of being simulatively given to the indirect transition-type semiconductor by regulation of electron motion.

    SPIN QUBIT-TYPE SEMICONDUCTOR DEVICE AND INTEGRATED CIRCUIT THEREOF

    公开(公告)号:US20230200261A1

    公开(公告)日:2023-06-22

    申请号:US18071173

    申请日:2022-11-29

    CPC classification number: H10N60/80 H10N60/11 H10N60/128 H10N69/00

    Abstract: The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device. The spin qubit-type semiconductor device includes a body comprised of at least one of a semiconductor layer itself formed with a quantum dot and a structural portion arranged around the semiconductor layer, a gate electrode arranged at a position on the semiconductor layer, which faces the quantum dot, at least one micro magnet wholly or partly embedded in the body so that a first position condition in which the micro magnet is at a position near the quantum dot, a second position condition in which the position of a lower end of the micro magnet is located below the gate electrode, and a third position condition in which when viewed from above the body, the micro magnet is arranged at a position having no rotational symmetry with the quantum dot as the center of rotation are satisfied, and a static magnetic field applying unit capable of applying a static magnetic field to the quantum dot and the micro magnet.

    TUNNEL FIELD-EFFECT TRANSISTOR AND METHOD FOR DESIGNING SAME

    公开(公告)号:US20210013316A1

    公开(公告)日:2021-01-14

    申请号:US16982924

    申请日:2019-03-22

    Abstract: [Problem] To improve the drain current ON/OFF ratio characteristics.
    [Solution] A tunnel field-effect transistor 10 of the present invention is such that, when the gate length is denoted by LG and the extension distance of a source region 1 extended toward a drain region 3 from a position in the source region 1 is denoted by LOV, LTG expressed in Formula (1) below as the shortest distance between the position of an extension end of the source region 1 based on a drain-side reference position as the side face position of a gate electrode 6a, 6b closest to the drain region 3, and the position in the semiconductor layer 4 opposite to the drain-side reference position in the height direction of the gate electrode 6a, 6b satisfies a condition of Inequality (2) below. Note that lt_OFF in Inequality (2) denotes a shortest tunnel distance over which carriers move from the source region to a channel region through a tunnel junction surface in an OFF state of the tunnel field-effect transistor.

    Tunnel field-effect transistor and method for designing same

    公开(公告)号:US11233131B2

    公开(公告)日:2022-01-25

    申请号:US16982924

    申请日:2019-03-22

    Abstract: [Problem] To improve the drain current ON/OFF ratio characteristics.
    [Solution] A tunnel field-effect transistor 10 of the present invention is such that, when the gate length is denoted by LG and the extension distance of a source region 1 extended toward a drain region 3 from a position in the source region 1 is denoted by LOV, LTG expressed in Formula (1) below as the shortest distance between the position of an extension end of the source region 1 based on a drain-side reference position as the side face position of a gate electrode 6a, 6b closest to the drain region 3, and the position in the semiconductor layer 4 opposite to the drain-side reference position in the height direction of the gate electrode 6a, 6b satisfies a condition of Inequality (2) below. Note that lt_OFF in Inequality (2) denotes a shortest tunnel distance over which carriers move from the source region to a channel region through a tunnel junction surface in an OFF state of the tunnel field-effect transistor.

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