公开(公告)号：US09484115B1

公开(公告)日：2016-11-01

申请号：US14711712

申请日：2015-05-13

Applicant: NVIDIA CORPORATION

Inventor： Stephen Felix ,  Hwong-Kwo Lin ,  Spencer Gold ,  Jing Guo ,  Andreas Gotterba ,  Jason Golbus ,  Karthik Natarajan ,  Jun Yang ,  Zhenye Jiang ,  Ge Yang ,  Lei Wang ,  Yong Li ,  Hua Chen ,  Haiyan Gong ,  Beibei Ren ,  Eric Voelkel

IPC: G11C29/08 ,  G11C11/16 ,  G11C7/00 ,  G11C5/14

CPC classification number: G11C11/1697 ,  G11C5/143 ,  G11C7/00 ,  G11C11/417 ,  G11C29/08 ,  G11C2207/2227

Abstract: A subsystem configured to select the power supply to a static random access memory cell compares the level of a dedicated memory supply voltage to the primary system supply voltage. The subsystem then switches the primary system supply to the SRAM cell when the system voltage is higher than the memory supply voltage with some margin. When the system voltage is lower than the memory supply voltage, with margin, the subsystem switches the memory supply to the SRAM cell. When the system voltage is comparable to the memory supply, the subsystem switches the system voltage to the SRAM cell if performance is a prioritized consideration, but switches the memory supply to the SRAM cell if power reduction is a prioritized consideration. In this manner, the system achieves optimum performance without incurring steady state power losses and avoids timing issues in accessing memory.

Abstract translation: 被配置为选择对静态随机存取存储器单元的电源的子系统将专用存储器电源电压的电平与主系统电源电压进行比较。 当系统电压高于具有一定余量的存储器电源电压时，子系统将主系统电源切换到SRAM单元。 当系统电压低于存储器电源电压时，子系统将存储器电源切换到SRAM单元。 当系统电压与存储器电源相当时，如果性能是优先考虑的话，子系统将系统电压切换到SRAM单元，但如果降低功耗是优先考虑的话，将存储器电源切换到SRAM单元。 以这种方式，系统实现最佳性能而不会导致稳态功率损耗，并避免访问存储器时的定时问题。

公开(公告)号：US08804437B2

公开(公告)日：2014-08-12

申请号：US13626090

申请日：2012-09-25

Applicant: Nvidia Corporation

Inventor： Andreas Gotterba ,  Joel DeWitt ,  Marek Smoszna

IPC: G11C7/10

CPC classification number: G11C7/12 ,  G11C11/419

Abstract: A column select multiplexer, a method of reading data from a random-access memory and a memory subsystem incorporating the multiplexer or the method. In one embodiment, the column select multiplexer includes: (1) a first field-effect transistor having a gate coupled via an inverter to a bitline of a static random-access memory array, (2) a second field-effect transistor coupled in series with the first field-effect transistor and having a gate coupled to a column select bus of the static random-access memory array and (3) a latch having an input coupled to the first and second field-effect transistors.

Abstract translation: 列选择多路复用器，从随机存取存储器读取数据的方法和结合多路复用器或方法的存储器子系统。 在一个实施例中，列选择多路复用器包括：（1）具有经由反相器耦合到静态随机存取存储器阵列的位线的栅极的第一场效应晶体管，（2）串联耦合的第二场效应晶体管 与第一场效应晶体管并且具有耦合到静态随机存取存储器阵列的列选择总线的栅极和（3）具有耦合到第一和第二场效应晶体管的输入的锁存器。

公开(公告)号：US20140085965A1

公开(公告)日：2014-03-27

申请号：US13626090

申请日：2012-09-25

Applicant: NVIDIA CORPORATION

Inventor： Andreas Gotterba ,  Joel DeWitt ,  Marek Smoszna

IPC: G11C11/413 ,  G11C7/10

CPC classification number: G11C7/12 ,  G11C11/419

Abstract: A column select multiplexer, a method of reading data from a random-access memory and a memory subsystem incorporating the multiplexer or the method. In one embodiment, the column select multiplexer includes: (1) a first field-effect transistor having a gate coupled via an inverter to a bitline of a static random-access memory array, (2) a second field-effect transistor coupled in series with the first field-effect transistor and having a gate coupled to a column select bus of the static random-access memory array and (3) a latch having an input coupled to the first and second field-effect transistors.

Abstract translation: 列选择多路复用器，从随机存取存储器读取数据的方法和结合多路复用器或方法的存储器子系统。 在一个实施例中，列选择多路复用器包括：（1）具有经由反相器耦合到静态随机存取存储器阵列的位线的栅极的第一场效应晶体管，（2）串联耦合的第二场效应晶体管 与第一场效应晶体管并且具有耦合到静态随机存取存储器阵列的列选择总线的栅极和（3）具有耦合到第一和第二场效应晶体管的输入的锁存器。