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公开(公告)号:US20250157862A1
公开(公告)日:2025-05-15
申请号:US18509642
申请日:2023-11-15
Applicant: NXP B.V.
Inventor: Yu Ling Tsai , Yen-Chih Lin , Yi-Hsuan Tsai , Yao Jung Chang
IPC: H01L23/04 , H01L21/48 , H01L21/52 , H01L23/00 , H01L23/367 , H01L23/552
Abstract: A semiconductor device having an integrated lid structure is provided. The method includes mounting a semiconductor die within a cavity of a lid structure. An active side of the semiconductor die is substantially coplanar with a bottom surface of the lid structure. An encapsulant substantially fills a gap region between sidewalls of the semiconductor die and inner sidewall surfaces of the cavity.
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公开(公告)号:US20190164784A1
公开(公告)日:2019-05-30
申请号:US15825079
申请日:2017-11-28
Applicant: NXP B.V.
Inventor: Siriluck Wongratanaporngoorn , Yao Jung Chang , Ekapong Tangpattanasaeree , Paradee Jitrungruang , Pitak Seantumpol
IPC: H01L21/56 , H01L21/683 , H01L21/768
Abstract: A method for wafer dicing and removing separated integrated circuit (IC) dies from a carrier substrate includes mounting a wafer on a substrate using an adhesive layer, laser scribing the adhesive layer to create defect regions in the adhesive layer, and performing a breaking step to separate the laser-scribed adhesive layer into separated adhesive portions corresponding to the IC dies. For a stealth-dicing (SD) technique, defect regions also are created in the wafer using a laser and the breaking step is an expansion step that simultaneously separates the dies and corresponding portions of adhesive. For a dice-before-grind (DBG) technique, the dies are separated by backside grinding before the breaking step. Efficient adhesive-layer separation is achieved with reduced backside chipping associated with conventional blade dicing.
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公开(公告)号:US20250157986A1
公开(公告)日:2025-05-15
申请号:US18505364
申请日:2023-11-09
Applicant: NXP B.V.
Inventor: Yen-Chih Lin , Yi-Hsuan Tsai , Yu Ling Tsai , Yao Jung Chang
IPC: H01L25/065 , H01L23/00 , H01L23/498 , H01L23/532
Abstract: A method of forming a die-in-die semiconductor device is provided. The method includes forming a first cavity in a backside of a first semiconductor die. The first semiconductor die has a back end of line (BEOL) region, a front end of line (FEOL) region, and a bulk region. A second semiconductor die is mounted in the first cavity. A bond pad of the second semiconductor die is interconnected through a bottom side of the first cavity with an embedded conductive trace of the BEOL region of the first semiconductor die.
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公开(公告)号:US20250006598A1
公开(公告)日:2025-01-02
申请号:US18342809
申请日:2023-06-28
Applicant: NXP B.V.
Inventor: Yao Jung Chang , Tzu Ya Fang , Yu Ling Tsai , Jian Nian Chen , Yen-Chih Lin
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31
Abstract: A method of manufacturing a semiconductor device is provided. The method includes affixing a spacer structure to a bottom side of a plurality of leads of a leadframe. A semiconductor die is attached to a top side of a die pad of the leadframe. The semiconductor die, the leadframe, and the spacer structure are encapsulated with an encapsulant. Portions of the spacer structure and portions of the leads of the plurality of leads are exposed at a bottom side of the encapsulant.
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公开(公告)号:US10607861B2
公开(公告)日:2020-03-31
申请号:US15825079
申请日:2017-11-28
Applicant: NXP B.V.
Inventor: Siriluck Wongratanaporngoorn , Yao Jung Chang , Ekapong Tangpattanasaeree , Paradee Jitrungruang , Pitak Seantumpol
IPC: H01L21/56 , H01L21/768 , H01L21/683 , H01L21/67 , H01L21/78 , B23K26/00
Abstract: A method for wafer dicing and removing separated integrated circuit (IC) dies from a carrier substrate includes mounting a wafer on a substrate using an adhesive layer, laser scribing the adhesive layer to create defect regions in the adhesive layer, and performing a breaking step to separate the laser-scribed adhesive layer into separated adhesive portions corresponding to the IC dies. For a stealth-dicing (SD) technique, defect regions also are created in the wafer using a laser and the breaking step is an expansion step that simultaneously separates the dies and corresponding portions of adhesive. For a dice-before-grind (DBG) technique, the dies are separated by backside grinding before the breaking step. Efficient adhesive-layer separation is achieved with reduced backside chipping associated with conventional blade dicing.
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公开(公告)号:US20250125159A1
公开(公告)日:2025-04-17
申请号:US18484533
申请日:2023-10-11
Applicant: NXP B.V.
Inventor: Yu Ling Tsai , Yao Jung Chang , Yen-Chih Lin , Tzu Ya Fang , Jian Nian Chen , Yi-Hsuan Tsai
Abstract: A semiconductor device having dismantlable structure is provided. The method includes forming a packaged semiconductor die by mounting the semiconductor die onto a package substrate in a flip chip orientation, attaching an interposer substrate over a backside of the semiconductor die, and encapsulating with an encapsulant the semiconductor die and remaining gap region between the package substrate and the interposer substrate. A bond pad of the semiconductor die is interconnected with a conductive trace of the package substrate. The interposer substrate includes a plurality of conductive pads exposed at a top surface and interconnected with the package substrate. A dismantlable structure is attached on the top surface of the interposer substrate. A first region of the dismantlable structure covers the plurality of conductive pads.
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公开(公告)号:US20250096077A1
公开(公告)日:2025-03-20
申请号:US18468958
申请日:2023-09-18
Applicant: NXP B.V.
Inventor: Yen-Chih Lin , Yao Jung Chang , Kuan Lin Huang , Yi-Hsuan Tsai , Meng-huang Sie
IPC: H01L23/495 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/48
Abstract: A method of forming a semiconductor device is provided. The method includes mounting a semiconductor die on a die pad of a leadframe. The die pad includes a central opening configured to expose a central portion of the semiconductor die. A first end of a bond wire is attached to a bond pad of the semiconductor die and a second end of the bond wire is attached to a lead of the leadframe. An encapsulant encapsulates the semiconductor die and the leadframe. A portion of the lead and a portion of the die pad are exposed and protruded through the encapsulant.
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公开(公告)号:US20240038683A1
公开(公告)日:2024-02-01
申请号:US17815638
申请日:2022-07-28
Applicant: NXP B.V.
Inventor: Tzu Ya Fang , Yen-Chih Lin , Jian Nian Chen , Moly Lee , Yi Xiu Xie , Vanessa Wyn Jean Tan , Yao Jung Chang , Yi-Hsuan Tsai , Xiu Hong Shen , Kuan Lin Huang
IPC: H01L23/00 , H01L25/065 , H01L23/31 , H01L23/48 , H01L23/538 , H01L21/683 , H01L21/48 , H01L21/56 , H01L25/00
CPC classification number: H01L23/562 , H01L25/0657 , H01L24/20 , H01L23/3128 , H01L23/481 , H01L23/5383 , H01L23/5386 , H01L23/5389 , H01L21/6835 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L21/568 , H01L24/19 , H01L25/50 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06586 , H01L2224/214 , H01L2924/17151 , H01L2924/351 , H01L2221/68372
Abstract: A method of manufacturing a semiconductor device is provided. The method includes placing a package substrate on a carrier substrate, forming a frame on the package substrate, and affixing an active side of a semiconductor die on the package substrate. The semiconductor die together with the frame and the package substrate form a cavity between the semiconductor die and the package substrate. At least a portion of the semiconductor die and the package substrate are encapsulated with an encapsulant. The frame is configured to prevent the encapsulant from entering the cavity.
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公开(公告)号:US20220399234A1
公开(公告)日:2022-12-15
申请号:US17347843
申请日:2021-06-15
Applicant: NXP B.V.
Inventor: WeiCheng Chuang , PaoTung Pan , Che Lun Cheng , Yao Jung Chang , Yu-Wen Chu , Chun-Hui Lee , Che-Kai Hsu , Kuan Lin Huang
IPC: H01L21/78 , H01L21/268 , H01L21/304 , H01L21/683 , H01L23/544 , H01L23/00 , H01L23/58
Abstract: A method of semiconductor die singulation is provided. The method includes forming a first trench along a singulation lane of a semiconductor wafer. A second trench is formed extending from a bottom of the first trench. A portion of the semiconductor wafer remains between a bottom of the second trench and a backside of the semiconductor wafer. A cut is formed by way of a laser to singulate die of the semiconductor wafer. The cut extends through the portion of the semiconductor wafer remaining between the bottom of the second trench and the backside of the semiconductor wafer.
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