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    Context knowledge modeling method for sharing and reusing context knowledge in context-aware system
    3.
    发明申请
    Context knowledge modeling method for sharing and reusing context knowledge in context-aware system 审中-公开
    上下文知识建模方法，用于在上下文感知系统中共享和重用上下文知识

    公开(公告)号：US20070038438A1

    公开(公告)日：2007-02-15

    申请号：US11438855

    申请日：2006-05-23

    申请人： Joon Cho ,  Hyun Kim ,  Hyoung Kim ,  Joo Lee ,  Chung Hong ,  Jin Jung

    发明人： Joon Cho ,  Hyun Kim ,  Hyoung Kim ,  Joo Lee ,  Chung Hong ,  Jin Jung

    IPC分类号： G06F17/27

    CPC分类号： G06F16/367

    摘要： A context knowledge modeling method is provided. The context knowledge modeling method includes the steps of: a) defining a context knowledge space as a two-dimensional space based on an abstract level and an application domain of knowledge; b) locating a share ontology as a highest level of the abstract level for defining a common ontology concept at a plurality of applications and services performed in various environment and domains; c) locating at least one of domain ontologies as a lower abstract level than the share ontology by taking over the ontology concept defined at the share ontology and defining a class and an attribute specialized at a corresponding domain and a developing application; and d) locating one or more instance bases expressing knowledge about real objects to have a lower abstract level than the domain ontologies.

    摘要翻译： 提供了上下文知识建模方法。 上下文知识建模方法包括以下步骤：a）基于知识的抽象层次和应用领域，将上下文知识空间定义为二维空间; b）将共享本体定位为在各种环境和域中执行的多个应用和服务中定义共同本体概念的抽象级别的最高级别; c）通过接管共享本体定义的本体概念并定义专门在相应域和开发应用的类和属性，将至少一个域本体定位为比共享本体更低的抽象级别; 以及d）找到一个或多个表示关于真实对象的知识的实例基础具有比领域本体更低的抽象级别。

    Method of sequentially forming silicide layer and contact barrier in semiconductor integrated circuit device
    4.
    发明申请
    Method of sequentially forming silicide layer and contact barrier in semiconductor integrated circuit device 审中-公开
    在半导体集成电路器件中依次形成硅化物层和接触屏障的方法

    公开(公告)号：US20060141722A1

    公开(公告)日：2006-06-29

    申请号：US11319709

    申请日：2005-12-29

    申请人： Hyoung Kim

    发明人： Hyoung Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L29/6656 ,  H01L21/28518 ,  H01L21/76843 ,  H01L29/66515 ,  H01L29/7833

    摘要： A method of sequentially forming a silicide layer and a contact barrier in a semiconductor device is provided. In the method, a pre-metal dielectric layer is deposited over an underlying structure that has a silicon substrate, a gate electrode on the substrate, and source/drain regions in the substrate. Contact holes are formed toward the gate electrode and the source/drain regions in the dielectric layer. Then, a metal layer for the silicide layer is selectively deposited on the bottom of the contact holes by using ion implantation, for example. Thereafter, the contact barrier is conformally deposited on entire exposed surface, and a heat-treatment process is performed to form the silicide layer from the metal layer.

    摘要翻译： 提供了一种在半导体器件中顺序地形成硅化物层和接触屏障的方法。 在该方法中，将金属前介电层沉积在具有硅衬底，衬底上的栅极电极和衬底中的源极/漏极区域的下面的结构上。 电介质层中的栅极电极和源极/漏极区域形成接触孔。 然后，例如，通过使用离子注入，在接触孔的底部选择性地沉积硅化物层的金属层。 此后，将接触屏障保形地沉积在整个暴露表面上，并进行热处理工艺以从金属层形成硅化物层。

    Liquid composition for immersion lithography and lithography method using the same
    5.
    发明申请
    Liquid composition for immersion lithography and lithography method using the same 审中-公开
    用于浸没式光刻的液体组合物及使用其的光刻方法

    公开(公告)号：US20050260528A1

    公开(公告)日：2005-11-24

    申请号：US10999528

    申请日：2004-11-30

    申请人： Keun Kong ,  Hyoung Kim ,  Hyeong Kim ,  Jae Jung ,  Sung Lee

    发明人： Keun Kong ,  Hyoung Kim ,  Hyeong Kim ,  Jae Jung ,  Sung Lee

    IPC分类号： G03F7/20 ,  C11D1/72 ,  G03F7/00 ,  H01L21/027

    CPC分类号： G03F7/2041

    摘要： Disclosed herein are a liquid composition for immersion lithography and a lithography method using the composition. The liquid composition includes at least one nonionic surfactant selected from the group comprising of a polyvinyl alcohol, a pentaerythritol-based compound, a polymer containing an alkylene oxide, and a compound represented by Formula I: wherein R is a linear or branched, substituted C1-C40 alkyl, and n is an integer ranging from 10 to 10,000. The surface tension of the liquid composition is reduced by the nonionic surfactant, thereby solving the problem that the liquid composition is not completely filled or is partially concentrated on a wafer having a fine topology and removing micro bubbles between the photoresist film and the liquid composition.

    摘要翻译： 本文公开了用于浸没式光刻的液体组合物和使用该组合物的光刻方法。 液体组合物包含至少一种非离子表面活性剂，其选自聚乙烯醇，季戊四醇基化合物，含有烯化氧的聚合物和由式I表示的化合物：其中R是直链或支链的取代的C C 1 -C 40烷基，n是10至10,000的整数。 通过非离子表面活性剂降低液体组合物的表面张力，从而解决液体组合物未完全填充或部分浓缩在具有细微拓扑结构的晶片上并且去除光致抗蚀剂膜和液体组合物之间的微小气泡的问题。

    Water heating apparatus using electrodes
    6.
    发明申请
    Water heating apparatus using electrodes 有权
    使用电极的水加热装置

    公开(公告)号：US20060204231A1

    公开(公告)日：2006-09-14

    申请号：US11356980

    申请日：2006-02-21

    申请人： Jay Choi ,  Hyoung Kim ,  Sung Park ,  Seong Cho

    发明人： Jay Choi ,  Hyoung Kim ,  Sung Park ,  Seong Cho

    IPC分类号： H05B3/60

    CPC分类号： F22B1/30 ,  F22B1/306

    摘要： A water heating apparatus using electrodes is provided. The water heating apparatus includes a heating tank in which electrolyte solution is stored and a plurality pairs of heating electrodes composed of positive electrodes and negative electrodes arranged in the heating tank at uniform intervals. Since the plurality of pairs of electrodes are arranged in the heating tank at uniform intervals, the heating operation can be always performed in a state where the electrolyte solution of no less than the minimum water level is stored regardless of the direction of the heating tank so that it is possible to heat water or to generate steam. Therefore, the water heating apparatus can be easily applied to a product that is inclined or upset and that is not in a specific direction.

    摘要翻译： 提供使用电极的加热装置。 水加热装置包括其中存储有电解质溶液的加热槽和以均匀间隔布置在加热罐中的由正极和负极组成的多对加热电极。 由于多对电极以均匀的间隔配置在加热槽中，因此不管加热箱的方向如何，在不低于最低水位的电解液存储的状态下，始终可以进行加热运转 可以加热水或产生蒸汽。 因此，水加热装置可以容易地应用于倾斜或不正常的并且不在特定方向的产品。

    Multilayer chip capacitor and method for manufacturing the same
    7.
    发明申请
    Multilayer chip capacitor and method for manufacturing the same 失效
    多层片式电容器及其制造方法

    公开(公告)号：US20060139848A1

    公开(公告)日：2006-06-29

    申请号：US11272893

    申请日：2005-11-15

    申请人： Hyoung Kim ,  Hyo Shin ,  Ho Choo

    发明人： Hyoung Kim ,  Hyo Shin ,  Ho Choo

    IPC分类号： H01G4/228

    CPC分类号： H01G4/232 ,  H01G4/012 ,  Y10T29/413 ,  Y10T29/417 ,  Y10T29/435

    摘要： A multilayer chip capacitor, and a method for manufacturing the same are Provided. The capacitor comprises a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.

    摘要翻译： 提供了一种多层片状电容器及其制造方法。 所述电容器包括电容体，所述电容体具有堆叠的多个电介质层，形成在所述电介质层上的多个第一和第二内部电极，每个所述内部电极包括主电极部分和引线部分，形成芯片保护侧部件 在电容器本体的两侧接触第一和第二内部电极的两侧，以及形成在电容器本体的外表面上的一对外部电极。 主电极部的宽度与电介质层的宽度相同，引线部的宽度小于电介质层的宽度。

    Method for designing development drawing of developable surface
    8.
    发明申请
    Method for designing development drawing of developable surface 有权
    可开发面开发图设计方法

    公开(公告)号：US20050143964A1

    公开(公告)日：2005-06-30

    申请号：US10867783

    申请日：2004-06-16

    申请人： Joo Lee ,  Hyun Kim ,  Hyoung Kim ,  Jin Jung

    发明人： Joo Lee ,  Hyun Kim ,  Hyoung Kim ,  Jin Jung

    IPC分类号： G06T17/10 ,  G06F17/10 ,  G06T17/30

    CPC分类号： G06T17/30

    摘要： Disclosed is a method for designing a development drawing of a developable surface, the method including the steps of: setting a control contour from a circumference surface of a 3-dimensional model; performing an algorithm LIDM-GC-Dvlp to search a control point set; outputting a control point of a profile curve; visualizing a developable surface typed general circumference surface; modifying a design by a user depending on the visualized result; selecting a developable surface segment intended to generate the development drawing; and performing an algorithm LIDM-GC-Plane-Dvlp for the control point to generate the development drawing.

    摘要翻译： 公开了一种用于设计可展开表面的显影图的方法，所述方法包括以下步骤：从三维模型的圆周表面设置控制轮廓; 执行算法LIDM-GC-Dvlp来搜索控制点集合; 输出轮廓曲线的控制点; 可视化表面类型的普通圆周表面; 根据可视化结果修改用户的设计; 选择用于生成开发图的可显影表面段; 并为控制点执行算法LIDM-GC-Plane-Dvlp以生成开发图。

    Method of manufacturing multilayered ceramic capacitor by spin coating and multilayered ceramic capacitor
    9.
    发明申请
    Method of manufacturing multilayered ceramic capacitor by spin coating and multilayered ceramic capacitor 失效
    通过旋涂和多层陶瓷电容器制造多层陶瓷电容器的方法

    公开(公告)号：US20050128680A1

    公开(公告)日：2005-06-16

    申请号：US11011092

    申请日：2004-12-15

    申请人： Hyo Shin ,  Seung Ra ,  Yong Kim ,  Hyoung Kim ,  Ho Choo ,  Jung Lee

    发明人： Hyo Shin ,  Seung Ra ,  Yong Kim ,  Hyoung Kim ,  Ho Choo ,  Jung Lee

    IPC分类号： H01G4/12 ,  C04B35/468 ,  H01G4/30 ,  H01G9/00 ,  H01G13/00 ,  H01G13/04

    CPC分类号： H01G4/30 ,  H01G4/1227 ,  Y10T29/417 ,  Y10T29/43 ,  Y10T29/435

    摘要： Disclosed herein is a method of manufacturing a multilayered ceramic capacitor by a spin coating process, and a multilayered ceramic capacitor obtained by the above method. The method of the current invention provides a plurality of dielectric layers formed by spin coating, in which the process of coating the dielectric layer and the process of printing the inner electrode can be provided as a single process. Therefore, the thickness of the dielectric layer is easily controlled while the dielectric layer is formed to be thin. Further, since the dielectric layers and the inner electrodes are formed successively, the processes of separating and layering the dielectric layers, and the process of compressing the ceramic multilayered body can be omitted. Thereby, the ceramic multilayered body need not be compressed, and thus, a pillowing phenomenon does not occur in the multilayered ceramic capacitor.

    摘要翻译： 本文公开了通过旋涂工艺制造多层陶瓷电容器的方法和通过上述方法获得的多层陶瓷电容器。 本发明的方法提供了通过旋涂形成的多个电介质层，其中涂覆介电层的过程和印刷内电极的过程可以作为单一工艺提供。 因此，在电介质层形成得较薄的同时容易控制电介质层的厚度。 此外，由于电介质层和内部电极依次形成，所以可以省略介电层的分离和分层工艺以及压缩陶瓷多层体的工艺。 因此，陶瓷多层体不需要被压缩，因此在多层陶瓷电容器中不会发生卷绕现象。