公开(公告)号：US20140183730A1

公开(公告)日：2014-07-03

申请号：US14199078

申请日：2014-03-06

申请人： Nae HISANO ,  Shigeo OHASHI ,  Yasuo OSONE ,  Yasuhiro NAKA ,  Hiroyuki TENMEI ,  Kunihiko NISHI ,  Hiroaki IKEDA ,  Masakazu ISHINO ,  Hideharu MIYAKE ,  Shiro UCHIYAMA

发明人： Nae HISANO ,  Shigeo OHASHI ,  Yasuo OSONE ,  Yasuhiro NAKA ,  Hiroyuki TENMEI ,  Kunihiko NISHI ,  Hiroaki IKEDA ,  Masakazu ISHINO ,  Hideharu MIYAKE ,  Shiro UCHIYAMA

IPC分类号： H01L23/00 ,  H01L23/34

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/473 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a liquid refrigerant, in which a heat receiving section of the liquid cooling module is disposed between said semiconductor element and said mounting substrate, and a plurality of secondary connecting bumps provided between said package substrate and said mounting substrate.

摘要翻译： 半导体器件包括安装基板，设置在所述安装基板上方的半导体元件，设置在所述安装基板上方的封装基板，其间具有所述半导体元件，并通过主连接凸块与所述半导体元件电连接;冷却所述半导体 液体制冷剂的热接收部分设置在所述半导体元件和所述安装基板之间，以及设置在所述封装基板和所述安装基板之间的多个次级连接凸块。

公开(公告)号：US20100171213A1

公开(公告)日：2010-07-08

申请号：US12683085

申请日：2010-01-06

申请人： Nae HISANO ,  Shigeo OHASHI ,  Yasuo OSONE ,  Yasuhiro NAKA ,  Hiroyuki TENMEI ,  Kunihiko NISHI ,  Hiroaki IKEDA ,  Masakazu ISHINO ,  Hideharu MIYAKE ,  Shiro UCHIYAMA

发明人： Nae HISANO ,  Shigeo OHASHI ,  Yasuo OSONE ,  Yasuhiro NAKA ,  Hiroyuki TENMEI ,  Kunihiko NISHI ,  Hiroaki IKEDA ,  Masakazu ISHINO ,  Hideharu MIYAKE ,  Shiro UCHIYAMA

IPC分类号： H01L23/473 ,  H01L23/488 ,  F28F7/00

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/473 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

摘要： A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a liquid refrigerant, in which a heat receiving section of the liquid cooling module is disposed between said semiconductor element and said mounting substrate, and a plurality of secondary connecting bumps provided between said package substrate and said mounting substrate.

摘要翻译： 半导体器件包括安装基板，设置在所述安装基板上方的半导体元件，设置在所述安装基板上方的封装基板，其间具有所述半导体元件，并通过主连接凸块与所述半导体元件电连接;冷却所述半导体 液体制冷剂的热接收部分设置在所述半导体元件和所述安装基板之间，以及设置在所述封装基板和所述安装基板之间的多个次级连接凸块。

公开(公告)号：US20090108464A1

公开(公告)日：2009-04-30

申请号：US12258547

申请日：2008-10-27

申请人： Shiro UCHIYAMA

发明人： Shiro UCHIYAMA

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/12 ,  H01L2221/68372 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05085 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/2518 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12036 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/00

摘要： A first insulating layer including a first contact pad made of conductive polysilicon and a second insulating layer including a second contact pad are formed over a semiconductor silicon layer. After this, a via hole for a through-hole electrode is formed until the via hole penetrates through at least the semiconductor silicon layer and the first contact pad and reaches to the second contact pad.

摘要翻译： 在半导体硅层上形成包括由导电多晶硅制成的第一接触焊盘和包括第二接触焊盘的第二绝缘层的第一绝缘层。 此后，形成用于通孔电极的通孔，直到通孔至少穿过半导体硅层和第一接触焊盘并到达第二接触焊盘。

公开(公告)号：US20080237806A1

公开(公告)日：2008-10-02

申请号：US12054453

申请日：2008-03-25

申请人： Shiro UCHIYAMA

发明人： Shiro UCHIYAMA

IPC分类号： H01L29/40

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A three-dimensional semiconductor device is produced by laminating a plurality of semiconductor chips having through-electrodes running through semiconductor substrates, wherein each through-electrode includes an internal electrode, a ring-shaped semiconductor, and an external electrode. The internal electrode is formed using an internal conductive film and includes a plurality of pillar semiconductors, each of which is formed in a rectangular shape or a polygonal shape. The pillar semiconductors are each arranged with a prescribed distance therebetween in connection with the ring-shaped semiconductor. The internal conductive film is embedded in regions between the ring-shaped semiconductor and the pillar semiconductors and between the pillar semiconductors adjoining together. This makes it possible to form trenches having uniform depth, thus realizing a high-speed film growth with respect to the conductive film.

摘要翻译： 通过层叠多个具有穿过半导体衬底的贯通电极的半导体芯片来制造三维半导体器件，其中每个通孔包括内部电极，环形半导体和外部电极。 内部电极使用内部导电膜形成，并且包括多个柱状半导体，其各自形成为矩形或多边形。 柱状半导体分别与环形半导体结合设置有规定的间隔。 内部导电膜嵌入在环状半导体和柱状半导体之间以及邻接在一起的柱状半导体之间的区域中。 这使得可以形成具有均匀深度的沟槽，从而实现相对于导电膜的高速膜生长。

公开(公告)号：US20080237781A1

公开(公告)日：2008-10-02

申请号：US12078295

申请日：2008-03-28

申请人： Shiro UCHIYAMA

发明人： Shiro UCHIYAMA

IPC分类号： H01L23/522 ,  H01L21/762 ,  H01L21/768

CPC分类号： H01L21/76264 ,  H01L21/76898 ,  H01L2924/0002 ,  Y10S438/977 ,  H01L2924/00

摘要： The semiconductor device according to the present invention includes a through electrode that penetrates through a silicon substrate, an isolation trench provided to penetrate through the silicon substrate to surround the through electrode, a silicon film in contact with an inner surface of the isolation trench, a silicon film in contact with an outer surface of the isolation trench, and an insulation film provided between the silicon films. According to the present invention, the silicon film within the isolation trench can be substantially regarded as a part of the silicon substrate. Therefore, even when the width of the isolation trench is increased to increase the etching rate, the width of the insulation film becoming a dead space can be made sufficiently small. Consequently, the chip area can be decreased.

摘要翻译： 根据本发明的半导体器件包括穿透硅衬底的穿透电极，设置成穿过硅衬底以包围通孔的隔离沟槽，与隔离沟槽的内表面接触的硅膜， 与隔离沟槽的外表面接触的硅膜，以及设置在硅膜之间的绝缘膜。 根据本发明，隔离沟槽内的硅膜可以基本上被认为是硅衬底的一部分。 因此，即使增加隔离沟槽的宽度以增加蚀刻速率，也可以使成为死区的绝缘膜的宽度足够小。 因此，可以减小芯片面积。

公开(公告)号：US20080079112A1

公开(公告)日：2008-04-03

申请号：US11857286

申请日：2007-09-18

申请人： Shiro UCHIYAMA

发明人： Shiro UCHIYAMA

IPC分类号： H01L29/94 ,  H01L21/02 ,  H01L29/00

CPC分类号： H01L27/0207 ,  H01L21/76898

摘要： A through electrode is formed prior to fabricating a semiconductor device by using a standard manufacturing method. Aside face of the through electrode is insulated from a semiconductor substrate by an insulating film, while the top face thereof is covered with a protective insulating film. These insulating films covering the through electrode protect a conductor of the through electrode and prevent emission of a contaminant from the conductor. Standard manufacturing conditions can be applied without change.

摘要翻译： 在通过使用标准制造方法制造半导体器件之前形成通孔电极。 通过绝缘膜将通孔电极的侧面与半导体基板绝缘，同时其顶面被保护绝缘膜覆盖。 覆盖通孔的这些绝缘膜保护通孔的导体，并防止污染物从导体发射。 标准制造条件可以无变化地应用。