Low latency message passing mechanism
    1.
    发明授权
    Low latency message passing mechanism 失效
    低延迟消息传递机制

    公开(公告)号:US07617363B2

    公开(公告)日:2009-11-10

    申请号:US11236386

    申请日:2005-09-26

    IPC分类号: G06F12/08 G06F15/163

    CPC分类号: G06F12/0813 H04L49/90

    摘要: In one embodiment, a method is provided. The method of this embodiment provides detecting by a network controller a flush occurring on a host bus of a DM (“direct messaging”) packet to a memory from a first cache line associated with a first processor; obtaining and storing the DM packet at a second cache line associated with the network controller; and sending the DM packet over a network to a third cache line associated with a second processor.

    摘要翻译: 在一个实施例中,提供了一种方法。 该实施例的方法提供了一种由网络控制器检测在与第一处理器相关联的第一高速缓存行中在DM(“直接消息”)分组的主机总线上发生的刷新到存储器的情况; 在与所述网络控制器相关联的第二高速缓存线上获取和存储所述DM分组; 以及通过网络将所述DM分组发送到与第二处理器相关联的第三高速缓存行。

    Aggregatable connectivity
    3.
    发明授权
    Aggregatable connectivity 有权
    可聚合连接

    公开(公告)号:US07415032B2

    公开(公告)日:2008-08-19

    申请号:US10294180

    申请日:2002-11-13

    IPC分类号: H04J3/16

    CPC分类号: H04L1/22

    摘要: A first device and a second device, each coupled to one or more signal paths, attempting to transmit symbols over one or more of the signal paths, identifying one or more signal paths over each of which each device is able to transmit a symbol to the other device and over which each device is able to receive a symbol from the other device, and enrolling the identified signal paths into an aggregation of signal paths operable to provide for communication between the devices.

    摘要翻译: 每个耦合到一个或多个信号路径的第一设备和第二设备尝试通过一个或多个信号路径发送符号,识别每个设备能够将符号传输到每个信号路径上的一个或多个信号路径 每个设备能够从其他设备接收符号,并且将所识别的信号路径注册到可用于提供设备之间的通信的信号路径的聚合中。

    Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection
    5.
    发明授权
    Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection 有权
    用于重置通过基于链路的互连互联的两个代理的物理层的方法和装置

    公开(公告)号:US07219220B2

    公开(公告)日:2007-05-15

    申请号:US10850783

    申请日:2004-05-21

    IPC分类号: G06F15/177 G06F9/00

    CPC分类号: H04L69/32

    摘要: A method for effecting an in-band reset of the physical layers of two agents interconnected through a link-based interconnection scheme. In accordance with one embodiment of the invention, a first of the two agents ceases its forwarded clock to initiate the in-band reset. Upon realization of the cessation, a second agent ceases its forwarded clock and proceeds to a reset state. The first agent then proceeds to a reset state. Subsequently, after waiting a specified period of time, both agents proceed with a re-initialization of the physical layer. In accordance with one embodiment of the invention, the re-initialization of the physical layer is effected without impacting other layers of the interconnection hierarchy.

    摘要翻译: 一种用于实现通过基于链路的互连方案互联的两个代理的物理层的带内复位的方法。 根据本发明的一个实施例,两个代理中的第一个停止其转发的时钟以启动带内复位。 在停止实现时,第二代理程序停止其转发的时钟并进入复位状态。 然后第一个代理进入复位状态。 随后,等待指定的时间段后,两个代理进行物理层的重新初始化。 根据本发明的一个实施例,实现物理层的重新初始化而不影响互连层次结构的其他层。

    Bundle skew management and cell synchronization
    6.
    发明授权
    Bundle skew management and cell synchronization 有权
    捆绑偏斜管理和单元同步

    公开(公告)号:US07206955B2

    公开(公告)日:2007-04-17

    申请号:US10745903

    申请日:2003-12-23

    IPC分类号: G06F1/12

    摘要: A method, apparatus and system are provided for bundle skew management and cell synchronization. According to one embodiment, determination is made as to whether a link upon which a cell was received was an expected link in a predetermined round-robin order. If the link upon which the cell was received was not the expected link in the round-robin order, a wait for arrival of a cell on the expected link for up to the value of a timer for the expected link is made. If the link is not the expected link, the link may be removed from the round-robin order and cell synchronization may be performed.

    摘要翻译: 提供了一种方法,装置和系统,用于束歪斜管理和单元同步。 根据一个实施例,确定接收到小区的链路是否是预定的循环次序的预期链路。 如果接收到信元的链路不是循环次序中的预期链路,则等待小区到达期望链路达到期望链路的定时器的值。 如果链路不是期望的链路,则链路可以从循环次序中移除,并且可以执行小区同步。

    Method and apparatus for receiving data based on tracking zero crossings
    7.
    发明授权
    Method and apparatus for receiving data based on tracking zero crossings 失效
    基于跟踪过零点接收数据的方法和装置

    公开(公告)号:US07113562B1

    公开(公告)日:2006-09-26

    申请号:US09749270

    申请日:2000-12-27

    IPC分类号: H03D3/24 H04L7/02

    摘要: Conventional receiver architectures are based on either frequency/phase tracking or oversampling. Both receiver types typically employ sensitive analog circuits, which create noise, consume power and utilize valuable space in their implementation. The invention adopts a novel approach to phase/frequency tracking that utilizes the edges or zero crossings of the input data waveform to effectively track the remote transmitter clock phase/frequency. This methodology minimizes the use of analog circuitry, thereby reducing the noise domain and the substrate space required for implementation of a tracking device.

    摘要翻译: 传统的接收机架构基于频率/相位跟踪或过采样。 两种接收机类型通常采用灵敏的模拟电路,它们产生噪声,消耗功率并在其实现中利用有价值的空间。 本发明采用新颖的相位/频率跟踪方法,利用输入数据波形的边缘或过零点有效跟踪远程发射机时钟相位/频率。 该方法最大限度地减少了模拟电路的使用,从而降低了实现跟踪设备所需的噪声区域和衬底空间。

    Method and apparatus for receiving data
    8.
    发明授权
    Method and apparatus for receiving data 失效
    用于接收数据的方法和装置

    公开(公告)号:US06917659B1

    公开(公告)日:2005-07-12

    申请号:US09749269

    申请日:2000-12-27

    IPC分类号: H04L7/00 H04L7/02 H04L7/033

    摘要: A method of recovering data from a modulated data signal includes tracking a transmitted clock with a plurality of locally-generated clock phases, estimating an average phase of previously detected edges, registering a pulse edge in the received stream of data at a transition phase corresponding to one of the plurality of locally-generated clock phases, determining whether a first symbol was received multiple times consecutively prior to the registered pulse edge, and using the determination of whether the first symbol was received multiple times consecutively in a receiver decision process.

    摘要翻译: 从调制数据信号恢复数据的方法包括利用多个本地生成的时钟相位跟踪传输的时钟,估计先前检测到的边沿的平均相位,在所接收的数据流中在对应于 所述多个本地生成的时钟相位中的一个,确定在所述注册的脉冲沿之前连续地多次接收到第一符号,并且使用在所述接收机决定处理中是否连续地接收到所述第一符号的确定。

    Direct message transfer between distributed processes
    9.
    发明授权
    Direct message transfer between distributed processes 失效
    分布式进程之间的直接消息传输

    公开(公告)号:US06647423B2

    公开(公告)日:2003-11-11

    申请号:US09097757

    申请日:1998-06-16

    IPC分类号: G06F1516

    CPC分类号: G06F9/546

    摘要: An interprocess communication technique transfers a message from a first process' memory (on a first computer system) directly to a second process' memory (on a second computer system). The message is identified by a virtual address and possibly a memory handle. The message is not stored in intermediary memory, such as operating system buffer memory, during the transfer. The communication technique may also provide virtual to physical address translation and memory protection. Memory protection is provided by ensuring that the communicating processes own the memory (the contents of which includes the message) being transferred between them.

    摘要翻译: 进程间通信技术将来自第一进程的存储器(在第一计算机系统上)的消息直接传送到第二进程的存储器(在第二计算机系统上)。 消息由虚拟地址和可能的存储器句柄来标识。 在传输过程中,消息不会存储在中间存储器中,如操作系统缓冲存储器。 通信技术还可以提供虚拟到物理地址转换和存储器保护。 通过确保通信进程拥有在它们之间转移的存储器(其内容包括消息)来提供存储器保护。

    Multi-link extensions and bundle skew management
    10.
    发明授权
    Multi-link extensions and bundle skew management 有权
    多链接扩展和捆绑偏移管理

    公开(公告)号:US06646991B1

    公开(公告)日:2003-11-11

    申请号:US09470189

    申请日:1999-12-22

    IPC分类号: G08C1500

    摘要: A method, apparatus, and system are provided for multi-link extensions and bundle skew management. According to one embodiment, multiple parallel links between a central processing unit (CPU) and a peripheral device are combined into a single channel, and cells on the various links are received in a round-robin order, and variations in flight time between the various links are compensated through a timer at each receive port of the bundle.

    摘要翻译: 提供了一种方法,装置和系统用于多链路扩展和捆绑偏移管理。 根据一个实施例,中央处理单元(CPU)和外围设备之间的多个并行链路被组合成单个信道,并且以循环次序接收各个链路上的小区,并且各种 链路通过每个接收端口上的定时器进行补偿。