D/A converter
    1.
    发明授权
    D/A converter 失效
    D / A转换器

    公开(公告)号:US5870045A

    公开(公告)日:1999-02-09

    申请号:US919316

    申请日:1997-08-28

    IPC分类号: H03M1/78 H03K17/687 H03M1/06

    CPC分类号: H03M1/0682 H03M1/785

    摘要: The present invention provides a D/A converter which has a small area in the chip, a linear current output and a high-speed operation. Each of resistors R.sub.11 -R.sub.n1 in a resistor train 11a is composed of four MOS transistors which are connected in parallel with each other and each of resistors R.sub.12 -R.sub.n2 in a resistor train 11b is composed of four MOS transistors which are connected in parallel with each other. Between the connecting nodes of the resistor trains 11a, 11b, MOS transistors ST.sub.11, ST.sub.12, ST.sub.13, ST.sub.14 -ST.sub.n1, ST.sub.n2, ST.sub.n3 and ST.sub.n4 which serve as switches and resistors are connected. All the MOS transistors have the same conductive type and size. Gate control signals C.sub.11 -C.sub.n1 ; C.sub.12 -C.sub.n2 turn MOS transistors ON but each of them has a different voltage value. A current difference between the output terminals Za and Zb is converted into a voltage difference by an operational amplifier or the like.

    摘要翻译: 本发明提供了一种在芯片中具有小面积的线性电流输出和高速操作的D / A转换器。 电阻器列11a中的每个电阻器R11-Rn1由并联连接的四个MOS晶体管组成,并且电阻器列11b中的每个电阻器R12-Rn2由与每个MOS晶体管并联连接的四个MOS晶体管组成 其他。 在电阻器列11a,11b的连接节点之间连接用作开关和电阻器的MOS晶体管ST11,ST12,ST13,ST14-STn1,STn2,STn3和STn4。 所有MOS晶体管具有相同的导电类型和尺寸。 门控制信号C11-Cn1; C12-Cn2使MOS晶体管导通,但每个都具有不同的电压值。 输出端子Za和Zb之间的电流差由运算放大器等转换成电压差。

    Apparatus and method for converting differential voltage to fully balanced currents
    2.
    发明授权
    Apparatus and method for converting differential voltage to fully balanced currents 失效
    将差分电压转换为完全平衡电流的装置和方法

    公开(公告)号:US06329849B1

    公开(公告)日:2001-12-11

    申请号:US09438428

    申请日:1999-11-12

    IPC分类号: H03L500

    摘要: The apparatus for converting a differential input voltage to two fully balanced output currents is achieved by providing a common mode control circuit of a simplified circuit construction to an operational transconductance amplifier. The apparatus includes an operational transconductance amplifier that is comprised of an OTA input section for converting two input voltages of the differential input voltage to a pair of interim output currents and an OTA output section for converting the interim output currents to the output currents, and a common mode controlling circuit for providing a control voltage to the OTA. The common mode control circuit is comprised of a substantially same circuit construction as the OTA output section and generates two output control currents based on the interim output currents from the OTA input section and the two output control currents from the common mode control circuit are summed and kept to be substantially zero in order to control the output currents from the OTA output section fully balanced.

    摘要翻译: 将差分输入电压转换为两个完全平衡的输出电流的装置通过将简化的电路结构的共模控制电路提供给运算跨导放大器来实现。 该装置包括一个工作跨导放大器,它包括用于将差分输入电压的两个输入电压转换成一对中间输出电流的OTA输入部分和用于将临时输出电流转换成输出电流的OTA输出部分,以及 共模控制电路,用于向OTA提供控制电压。 共模控制电路包括与OTA输出部分基本相同的电路结构,并且基于来自OTA输入部分的中间输出电流产生两个输出控制电流,并且来自共模控制电路的两个输出控制电流相加, 保持基本上为零,以便控制来自OTA输出部分的输出电流完全平衡。

    Multi-input transistor circuit and multi-input transconductance circuit
    3.
    发明授权
    Multi-input transistor circuit and multi-input transconductance circuit 失效
    多输入晶体管电路和多输入跨导电路

    公开(公告)号:US5977818A

    公开(公告)日:1999-11-02

    申请号:US418447

    申请日:1995-04-07

    摘要: A multi-input transistor circuit including a plurality of input MOS transistors having gates each serving as an analog voltage input terminal, operating in a non-saturation area and connected in parallel; and circuit for providing a constant drain/source voltage for each of the input MOS transistors, and having a current output point. A multi-input transconductance circuit including first and second MOS transistor groups having gates serving as first and second analog voltage input terminals, respectively, operating in a non-saturation area and connected in parallel; and a circuit for providing constant drain/source voltage for the transistors in each group and connected to a common source connecting point of each of the first and second MOS transistor groups, and having first and second current output terminals. The multi-input transistor and the multi-input transconductance circuit exhibit input-to-output linearity, have a wide dynamic range and are equivalent to an n-gate transistor.

    摘要翻译: 一种多输入晶体管电路,包括多个具有各自用作模拟电压输入端的栅极的输入MOS晶体管,在非饱和区域中并联并联; 以及用于为每个输入MOS晶体管提供恒定的漏极/源极电压并具有电流输出点的电路。 一种多输入跨导电路,包括分别具有用作第一和第二模拟电压输入端的栅极的第一和第二MOS晶体管组,工作在非饱和区并并联连接; 以及用于为每个组中的晶体管提供恒定的漏极/源极电压并且连接到第一和第二MOS晶体管组中的每一个的公共源极连接点并且具有第一和第二电流输出端子的电路。 多输入晶体管和多输入跨导电路具有输入到输出的线性度,具有宽动态范围并且等效于n栅极晶体管。

    Impedance adjusting circuit
    4.
    发明授权
    Impedance adjusting circuit 失效
    阻抗调节电路

    公开(公告)号:US06344780B1

    公开(公告)日:2002-02-05

    申请号:US09397012

    申请日:1999-09-15

    IPC分类号: H03H740

    CPC分类号: H03H11/245

    摘要: An impedance adjusting circuit for setting accurate impedance ratio has a plurality of paths each having impedance adjusting section which is a serially connected switch element and impedance element. A synthesized impedance of an ON resistance of the switch element and impedance of the impedance element in each impedance adjusting section is set to have a predetermined proportional relation. This enables accurate trimming without generating peak level variation of frequency characteristic when applied to a filter.

    摘要翻译: 用于设置精确阻抗比的阻抗调节电路具有多个路径,每个路径均具有串联连接的开关元件和阻抗元件的阻抗调节部分。 将开关元件的导通电阻和阻抗元件的阻抗的合成阻抗设定为具有规定的比例关系。 这使得能够在施加到滤波器时不产生频率特性的峰值电平变化的精确微调。

    BALANCED AMPLIFIER AND FILTER USING THE SAME
    5.
    发明申请
    BALANCED AMPLIFIER AND FILTER USING THE SAME 失效
    使用平衡放大器和滤波器

    公开(公告)号:US20050146381A1

    公开(公告)日:2005-07-07

    申请号:US11059380

    申请日:2005-02-17

    IPC分类号: H03F3/45 H03H11/04

    摘要: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.

    摘要翻译: 一种平衡放大器,包括一对电压 - 电流转换器,包括第一输入端子,第二输入端子,第一输出端子和第二输出端子,用于将施加到第一输入端子的输入电压转换为从 第一输出端子和第二输出端子,其中一个转换器的第二输入端子和第二输出端子连接到另一个转换器的第二输入端子和第二输出端子,以抵消共模元件 并提取差分模式组件。

    Amplifier circuit
    6.
    发明授权
    Amplifier circuit 失效
    放大器电路

    公开(公告)号:US06359510B1

    公开(公告)日:2002-03-19

    申请号:US09658194

    申请日:2000-09-08

    IPC分类号: H03F345

    摘要: A balanced type DDA 1 is combined with a single end type DDA 2 to form a differential amplifier circuit 3 which is a balanced type DDA. The balanced type DDA 1 has four input terminals VPP, VPN, VNN and VNP which are input terminals of two differential input stages, and two output terminals VoutP and VoutN which are output terminals of two output stages. These terminals are four input terminals and two output terminals of the differential amplifier circuit 3. The single end type DDA 2 has four input terminals, which are input terminals of two differential input stages and which are connected to the four input terminals of the differential amplifier circuit 3, respectively. The single end type DDA 2 also has an output terminal Vout of one output stage, which serves as a control output terminal for the feedback control of the differential amplifier circuit 3. By the negative feedback of the signal of the control output terminal Vout, a virtual short-circuit can be established between two input terminals of each differential input stages, so that it is possible to reduce distortion without reducing gains.

    摘要翻译: 平衡型DDA 1与单端DDA2组合以形成平衡型DDA的差分放大器电路3。 平衡型DDA1具有作为两个差分输入级的输入端子的四个输入端子VPP,VPN,VNN和VNP以及两个输出级的输出端子的两个输出端子VoutP和VoutN。 这些端子是差分放大器电路3的四个输入端子和两个输出端子。单端型DDA2具有四个输入端子,它们是两个差分输入级的输入端子,它们连接到差分放大器的四个输入端子 电路3。 单端型DDA2还具有一个输出级的输出端Vout,其作为用于差分放大器电路3的反馈控制的控制输出端。通过控制输出端Vout的信号的负反馈,a 可以在每个差分输入级的两个输入端之间建立虚拟短路,使得可以在不减少增益的情况下减少失真。

    Balanced amplifier and filter using the same
    8.
    发明授权
    Balanced amplifier and filter using the same 失效
    平衡放大器和滤波器使用相同

    公开(公告)号:US06781464B2

    公开(公告)日:2004-08-24

    申请号:US10281103

    申请日:2002-10-28

    IPC分类号: H03F345

    摘要: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.

    摘要翻译: 一种平衡放大器,包括一对电压 - 电流转换器,包括第一输入端子,第二输入端子,第一输出端子和第二输出端子,用于将施加到第一输入端子的输入电压转换为从 第一输出端子和第二输出端子,其中一个转换器的第二输入端子和第二输出端子连接到另一个转换器的第二输入端子和第二输出端子,以抵消共模元件 并提取差分模式组件。

    Balanced amplifier using single-ended output operational amplifiers
    9.
    发明授权
    Balanced amplifier using single-ended output operational amplifiers 失效
    平衡放大器采用单端输出运算放大器

    公开(公告)号:US5990737A

    公开(公告)日:1999-11-23

    申请号:US66933

    申请日:1998-04-28

    IPC分类号: H03F3/45

    摘要: A balanced amplifier includes first and second multi-input single-ended output differential amplifiers having matched characteristics and a feedback circuit. The feedback circuit connects differential input terminals and output terminals of the first and second multi-input single-ended output differential amplifiers so that all of the differential input terminals of the first and second multi-input single-ended output differential amplifiers are virtually shorted.

    摘要翻译: 平衡放大器包括具有匹配特性的第一和第二多输入单端输出差分放大器以及反馈电路。 反馈电路连接第一和第二多输入单端输出差分放大器的差分输入端和输出端,使得第一和第二多输入单端输出差分放大器的所有差分输入端实际上短路。

    Current mirror circuit
    10.
    发明授权
    Current mirror circuit 失效
    电流镜电路

    公开(公告)号:US5986507A

    公开(公告)日:1999-11-16

    申请号:US716714

    申请日:1996-09-12

    CPC分类号: H03F3/345 G05F3/262

    摘要: A current mirror circuit comprises a first current-to-voltage converter for inputting an input current, a second current-to-voltage converter, a first transistor, the collector or drain of which outputs an output current, and the emitter or source of which is connected to the second current-to-voltage converter, and a control unit for controlling a control electrode of the first transistor. The control unit refers a voltage current-to-voltage converted by the first and second current-to-voltage converters to control the first transistor so that currents flow from the control unit to the first and second current-to-voltage converters at a predetermined ratio.

    摘要翻译: 电流镜电路包括用于输入输入电流的第一电流 - 电压转换器,第二电流 - 电压转换器,第一晶体管,其集电极或漏极输出输出电流,其发射极或源极 连接到第二电流 - 电压转换器,以及用于控制第一晶体管的控制电极的控制单元。 控制单元是指由第一和第二电流 - 电压转换器转换的电压电流 - 电压以控制第一晶体管,使得电流以预定的方式从控制单元流向第一和第二电流 - 电压转换器 比。