公开(公告)号：US09263298B2

公开(公告)日：2016-02-16

申请号：US12919293

申请日：2009-02-26

申请人： Naoki Matsumoto ,  Kazuto Takai ,  Reika Ko ,  Nobuyuki Okayama

发明人： Naoki Matsumoto ,  Kazuto Takai ,  Reika Ko ,  Nobuyuki Okayama

IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/67

CPC分类号： H01L21/32137 ,  H01J37/32192 ,  H01J37/32935 ,  H01J2237/2001 ,  H01L21/67109 ,  H01L21/67248

摘要： A plasma etching apparatus 11 includes a mounting table that holds a semiconductor substrate W thereon; a first heater 18a that heats a central region of the semiconductor substrate W held on the mounting table 14; a second heater 18b that heats an edge region around the central region of the semiconductor substrate W held on the mounting table 14; a reactant gas supply unit 13 that supplies a reactant gas for a plasma process toward the central region of the semiconductor substrate W held on the mounting table 14; and a control unit 20 that performs a plasma etching process on the semiconductor substrate W while controlling the first heater 18a and the second heater 18b to heat the central region and the edge region of the processing target substrate W held on the mounting table 14 to different temperatures.

摘要翻译： 等离子体蚀刻装置11包括在其上保持半导体衬底W的安装台; 第一加热器18a，其加热保持在安装台14上的半导体基板W的中心区域; 第二加热器18b，其加热保持在安装台14上的半导体基板W的中心区域周围的边缘区域; 向保持在安装台14上的半导体基板W的中心区域供给等离子体处理用反应气体的反应气体供给部13; 以及控制单元20，其在控制第一加热器18a和第二加热器18b的同时对半导体基板W进行等离子体蚀刻处理，以将保持在安装台14上的处理对象基板W的中心区域和边缘区域加热到不同 温度。

公开(公告)号：US20120012556A1

公开(公告)日：2012-01-19

申请号：US12919293

申请日：2009-02-26

申请人： Naoki Matsumoto ,  Kazuto Takai ,  Reika Ko ,  Nobuyuki Okayama

发明人： Naoki Matsumoto ,  Kazuto Takai ,  Reika Ko ,  Nobuyuki Okayama

IPC分类号： C23F1/00 ,  C23F1/08

CPC分类号： H01L21/32137 ,  H01J37/32192 ,  H01J37/32935 ,  H01J2237/2001 ,  H01L21/67109 ,  H01L21/67248

摘要： A plasma etching apparatus 11 includes a mounting table that holds a semiconductor substrate W thereon; a first heater 18a that heats a central region of the semiconductor substrate W held on the mounting table 14; a second heater 18b that heats an edge region around the central region of the semiconductor substrate W held on the mounting table 14; a reactant gas supply unit 13 that supplies a reactant gas for a plasma process toward the central region of the semiconductor substrate W held on the mounting table 14; and a control unit 20 that performs a plasma etching process on the semiconductor substrate W while controlling the first heater 18a and the second heater 18b to heat the central region and the edge region of the processing target substrate W held on the mounting table 14 to different temperatures.

摘要翻译： 等离子体蚀刻装置11包括在其上保持半导体衬底W的安装台; 第一加热器18a，其加热保持在安装台14上的半导体基板W的中心区域; 第二加热器18b，其加热保持在安装台14上的半导体基板W的中心区域周围的边缘区域; 向保持在安装台14上的半导体基板W的中心区域供给等离子体处理用反应气体的反应气体供给部13; 以及控制单元20，其在控制第一加热器18a和第二加热器18b的同时对半导体基板W进行等离子体蚀刻处理，以将保持在安装台14上的处理对象基板W的中心区域和边缘区域加热到不同 温度。

公开(公告)号：US20110240598A1

公开(公告)日：2011-10-06

申请号：US13129607

申请日：2009-08-25

申请人： Nobuyuki Okayama ,  Naoki Matsumoto

发明人： Nobuyuki Okayama ,  Naoki Matsumoto

IPC分类号： C23F1/00 ,  C23F1/08

CPC分类号： H01J37/3244 ,  C23C16/452 ,  C23C16/4558 ,  H01J37/32192

摘要： A plasma processing apparatus 11 includes a reactant gas supply unit 13 for supplying a reactant gas for a plasma process into a processing chamber 12. The reactant gas supply unit 13 includes a first reactant gas supply unit 61 provided at a center of a dielectric plate 16 and configured to supply the reactant gas in a directly downward direction toward a central region of a processing target substrate W held on a holding table 14; and a second reactant gas supply unit 62 provided at a position directly above the holding table 14 but not directly above the processing target substrate W held on the holding table 14 and configured to supply the reactant gas toward a center of the processing target substrate W held on the holding table 14.

摘要翻译： 等离子体处理装置11包括用于将等离子体处理用反应气体供给到处理室12中的反应气供给部13.反应气供给部13具备设置在电介质板16的中央的第一反应气供给部61 并且被配置为朝向保持在保持台14上的处理对象基板W的中心区域的直接向下方向供给反应气体; 以及第二反应气体供给部62，其设置在保持台14正上方的位置，但不是保持在保持台14上的处理对象基板W的正上方，并被配置为朝向处理对象基板W的中心供给反应气体 在桌子14上。

公开(公告)号：US08920596B2

公开(公告)日：2014-12-30

申请号：US12862915

申请日：2010-08-25

申请人： Naoki Mihara ,  Naoki Matsumoto ,  Jun Yoshikawa ,  Kazuo Murakami

发明人： Naoki Mihara ,  Naoki Matsumoto ,  Jun Yoshikawa ,  Kazuo Murakami

IPC分类号： H01L21/3065 ,  H01J37/32

CPC分类号： H01J37/32192 ,  C23C16/513 ,  H01J37/3244 ,  H01J37/32449

摘要： In a plasma processing apparatus for processing a substrate by plasmatizing a process gas introduced into a processing container, an introducing unit which introduces the process gas is formed on a ceiling surface of the processing container; a gas retention portion which gathers the process gas supplied from the outside of the processing container through a supply passage, and a plurality of gas ejection holes which allow communication between the gas retention portion and the inside of the processing container are formed in the introducing unit; a gas ejection hole is not formed in a location of the gas retention portion that faces an opening of the supply passage; and a cross section of each of the gas ejection holes has a flat shape.

摘要翻译： 在通过对引入到处理容器中的处理气体进行等离子体处理衬底的等离子体处理装置中，在处理容器的顶表面上形成引入处理气体的引入单元; 气体保持部，其通过供给通路收集从处理容器的外部供给的处理气体，并且在导入单元中形成有能够使气体保持部与处理容器内部连通的多个气体喷出孔 ; 在气体保持部的与供给通道的开口相对的位置处不形成气体喷出孔; 并且每个气体喷射孔的横截面具有扁平形状。

公开(公告)号：US08877004B2

公开(公告)日：2014-11-04

申请号：US12866545

申请日：2009-02-06

申请人： Naoki Matsumoto ,  Kazuyuki Kato ,  Masafumi Shikata ,  Masaru Sasaki

发明人： Naoki Matsumoto ,  Kazuyuki Kato ,  Masafumi Shikata ,  Masaru Sasaki

IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306 ,  H01J37/32 ,  H05H1/46

CPC分类号： H05H1/46 ,  H01J37/32192 ,  H01J37/32238

摘要： A dielectric plate 20 is provided at a ceiling surface facing a susceptor 3 of a processing chamber 2, and a slot antenna 30 having a multiple number of microwave transmissive slots 33 is provided on a top surface of the dielectric plate 20. A protrusion member 21 configured as a separate member from the dielectric plate 20 is provided on a peripheral portion of a bottom surface of the dielectric plate 20 so as to prevent an abnormal electric discharge. Electric field intensity in the vicinity of the dielectric plate 20 is controlled by adjusting a gap between an outer peripheral surface 22 of a cylindrical part of the protrusion member 21 and an inner peripheral surface 5a of a sidewall of the processing chamber 2 or by adjusting a thickness of the cylindrical part of the protrusion member 21.

摘要翻译： 电介质板20设置在面向处理室2的基座3的顶面上，并且具有多个微波透射槽33的缝隙天线30设置在电介质板20的顶表面上。突起构件21 在电介质板20的底面的周边部设置有与电介质板20分离的部件，以防止异常放电。 通过调整突起部件21的圆筒部的外周面22与处理室2的侧壁的内周面5a之间的间隙，调整电介质板20附近的电场强度， 突出部件21的圆筒部的厚度。

公开(公告)号：US08617865B2

公开(公告)日：2013-12-31

申请号：US13124510

申请日：2009-10-02

申请人： Megumi Nakagawa ,  Naoki Matsumoto ,  Hitoshi Amano ,  Shotaro Yamaguchi

发明人： Megumi Nakagawa ,  Naoki Matsumoto ,  Hitoshi Amano ,  Shotaro Yamaguchi

IPC分类号： C12N9/14

CPC分类号： C12N9/18 ,  C12P7/42

摘要： Disclosed is a thermostable tannase derived from a microorganism. Specifically disclosed is a thermostable tannase derived from Aspergillus awamori or Aspergillus niger. A preferred embodiment of the tannase has the following chemoenzymatic properties: (1) activity: to act on a depside bond to thereby cause hydrolysis; (2) molecular weight: about 230,000 Da (as measured by gel filtration); and (3) thermal stability: stable at a temperature up to 65° C. (pH 5.0, 30 min.)

摘要翻译： 公开了一种衍生自微生物的热稳定性鞣酸酶。 具体公开了源自泡盛曲霉或黑曲霉的热稳定性鞣酸酶。 鞣酸酶的优选实施方案具有以下化学酶学性质：（1）活性：作用于脱附键从而引起水解; （2）分子量：约230,000Da（通过凝胶过滤测量）; 和（3）热稳定性：在高达65℃的温度下稳定（pH5.0,30分钟）

公开(公告)号：USD694791S1

公开(公告)日：2013-12-03

申请号：US29416088

申请日：2012-03-19

申请人： Naoki Matsumoto ,  Jun Yoshikawa

设计人： Naoki Matsumoto ,  Jun Yoshikawa

公开(公告)号：USD694790S1

公开(公告)日：2013-12-03

申请号：US29416082

申请日：2012-03-19

申请人： Naoki Matsumoto ,  Jun Yoshikawa

设计人： Naoki Matsumoto ,  Jun Yoshikawa

公开(公告)号：US20130134434A1

公开(公告)日：2013-05-30

申请号：US13307396

申请日：2011-11-30

申请人： Hidenori Mikami ,  Naoki Matsumoto ,  Hideki Osada ,  Yusuke Yoshizumi ,  Sayuri Yamaguchi

发明人： Hidenori Mikami ,  Naoki Matsumoto ,  Hideki Osada ,  Yusuke Yoshizumi ,  Sayuri Yamaguchi

IPC分类号： H01L29/15

CPC分类号： H01S5/3202 ,  B82Y20/00 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/808 ,  H01L29/812 ,  H01S5/2201 ,  H01S5/34333 ,  H01S2301/176

摘要： A nitride semiconductor device includes a main surface and an indicator portion. The main surface is a plane inclined by at least 71° and at most 79° in a [1-100] direction from a (0001) plane or a plane inclined by at least 71° and at most 79° in a [−1100] direction from a (000-1) plane. The indicator portion indicates a (−1017) plane, a (10-1-7) plane, or a plane inclined by at least −4° and at most 4° in the [1-100] direction from these planes and inclined by at least −0.5° and at most 0.5° in a direction orthogonal to the [1-100] direction.

摘要翻译： 氮化物半导体器件包括主表面和指示器部分。 主表面是在[0001]面或[-1100]中倾斜至少71°和最多79°的平面的[1-100]方向上倾斜至少71°和至多79°的平面 ]方向从（000-1）平面。 指示器部分表示（-1017）面，（10-1-7）面，或在这些平面沿[1-100]方向倾斜至少-4°至最多4°的平面，并且倾斜于 在与[1-100]方向正交的方向上至少为-0.5°且至多0.5°。

公开(公告)号：US08410817B2

公开(公告)日：2013-04-02

申请号：US12858295

申请日：2010-08-17

申请人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

发明人： Yuji Kuwana ,  Naoki Matsumoto ,  Yasuhiro Urabe

IPC分类号： H03K19/0175 ,  H03B1/00

CPC分类号： H03K19/001 ,  H03K17/04126 ,  H03K19/0136 ,  H03K2217/0036

摘要： A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.

摘要翻译： 电平开关电路接收数字输入信号，并产生具有与所接收的输入信号的值对应的电压电平的电平信号。 缓冲电路接收电平信号，并通过其输出端输出电平信号。 偏置电流产生电路产生包括具有恒定电平的DC分量和根据输入信号而变化的可变分量的偏置电流，并将由此产生的偏置电流提供给缓冲电路。 偏置电流产生电路检测输入信号的边缘，并且在如此检测到的边缘之后的预定时间段内将偏置电流提高预定量。