摘要:
When transmitting an RF signal for power supply or a pulse signal for data transmission, amplification is made in such a manner that the peak power of the RF signal becomes greater than the peak power of the pulse signal. Thus transmitting the RF signal with the greater peak power enables charging of a capacitor 23 of noncontact wireless communication equipment 2 even if the distance to the noncontact wireless communication equipment 2 is long.
摘要:
When transmitting an RF signal for power supply or a pulse signal for data transmission, amplification is made in such a manner that the peak power of the RF signal becomes greater than the peak power of the pulse signal. Thus transmitting the RF signal with the greater peak power enables charging of a capacitor 23 of noncontact wireless communication equipment 2 even if the distance to the noncontact wireless communication equipment 2 is long.
摘要:
When transmitting an RF signal for power supply or a pulse signal for data transmission, amplification is made in such a manner that the peak power of the RF signal becomes greater than the peak power of the pulse signal. Thus transmitting the RF signal with the greater peak power enables charging of a capacitor 23 of noncontact wireless communication equipment 2 even if the distance to the noncontact wireless communication equipment 2 is long.
摘要:
When transmitting an RF signal for power supply or a pulse signal for data transmission, amplification is made in such a manner that the peak power of the RF signal becomes greater than the peak power of the pulse signal. Thus transmitting the RF signal with the greater peak power enables charging of a capacitor 23 of noncontact wireless communication equipment 2 even if the distance to the noncontact wireless communication equipment 2 is long.
摘要:
A fault recovery process of a computer is provided for removing a fault from the system as soon as possible, minimizing the secondary fault and improving the availability of the system. In a reliable computer, which includes a system bus, a main memory connected to the system bus, and at least one processing board connected to the system bus, at least one processing board executes the same instructions by n (n>=3) processing units having cache memories respectively. When one of the processing units of the processing board becomes faulty, the other processing units continue executing the processes, which are being executed by the faulty processing board, and then, the processes to be registered in the faulty processing board, are succeeded by other processing boards.
摘要:
The identification acquirement instructing unit 171 transmits an identification acquiring command to the storage apparatus (the IC tag). The identification receiving unit 181 receives the identification information of the storage apparatus. The protocol deciding unit 130, based on the identification information of the storage apparatus, decides the group of the extension commands (the protocols) that the storage apparatus can interprets. and the extension command transforming unit 140 transforms the common command acquired by the common command acquiring unit 161 to an extension command. the command transmitting unit 172 transmits it to the storage apparatus.
摘要:
A determining apparatus ensures an assurance value of reliability in the determination result for determining the correct tag. A signal receiving unit 121 receives a signal transmitted by the tag (the communication apparatus), a plurality of times. An identification acquiring unit 122 acquires identification data of the tag based on the received signal. The reception counting unit 123 counts a number of reception times the signal is received for each tag. The apparatus determining unit 132 determines that the tag having the more number of reception times as the correct tag (the communication partner) when the difference in the number of reception times is greater than or equal to the times difference threshold.
摘要:
Two-dimensional addresses of lateral lines of a rectangular area are produced in a prescribed scanning order in a sender-memory control unit as readout addresses of a sender's memory, pieces of pixel data corresponding to the readout addresses are read out from the sender's memory, the pieces of pixel data read out are sub-sampled at a sample ratio of n:1 in a direction of each lateral line according to a quincunx method in a data transforming unit, two-dimensional write addresses of a receiver's memory are produced in a receiver-memory control unit, and pieces of sub-sampled pixel data are written in the receiver's memory. Accordingly, the pieces of pixel data can be sub-sampled and transferred at a high speed in a DMA transfer apparatus.
摘要:
A communication apparatus for mutual communication, when acting as an authenticator communication apparatus performing authentication, includes a transmitting section that transmits to an authenticatee communication apparatus subject to authentication challenge data to authenticate the authenticatee communication apparatus in a time slot, which is a segmented period of time in which the communication apparatus to communicate with a specific communication apparatus; and a receiving section that receives from the authenticatee communication apparatus first response data for responding to the challenge data in the same time slot as the one in which the transmitting section transmits the challenge data. An objective is to carry out authentication of a tag by a Reader/Writer (R/W) and authentication of the R/W by the tag at the same time as an anti-collision process, and to further achieve confidentiality of unique ID information that is transmitted.
摘要:
In a bridge method, bus bridge, and multiprocessor system for predicting request signals to be received, issuance of and data-caching in response to request signals is based on prediction results, and responses are sent to request signals that are actually issued. A request prediction unit predicts the contents of a request signal to be issued from a device connected to a local bus. A cache hit judgment unit determines whether data to be requested is found in a bridge cache. If the data is not found, a request issuer issues a request signal to a device connected to a system bus, such as a memory, before a request signal is actually issued via the local bus. The data obtained as a result is cached in the bridge cache. When the device connected to the local bus actually issues the request signal a response is immediately made, using the data in the bridge cache. Processing delays caused by forcing devices that request data to wait and corresponding reductions in system performance are reduced.