公开(公告)号：US10031856B2

公开(公告)日：2018-07-24

申请号：US14055367

申请日：2013-10-16

申请人： NVIDIA Corporation

发明人： Jerome F. Duluk, Jr. ,  Chenghuan Jia ,  John Mashey ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove

IPC分类号： G06F3/00 ,  G06F12/1009 ,  G06F12/10

CPC分类号： G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US11741015B2

公开(公告)日：2023-08-29

申请号：US17820870

申请日：2022-08-18

申请人： NVIDIA CORPORATION

发明人： Jerome F. Duluk, Jr. ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove ,  Chenghuan Jia ,  John Mashey

IPC分类号： G06F11/07 ,  G06F12/08 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F12/10 ,  G06F12/1009

CPC分类号： G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/109 ,  G06F12/1072 ,  G06F12/12 ,  G06F12/10 ,  G06F2212/1016

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US11106261B2

公开(公告)日：2021-08-31

申请号：US16179620

申请日：2018-11-02

申请人： NVIDIA Corporation

发明人： Aniket Naik ,  Siddharth Bhargav ,  Bardia Zandian ,  Narayan Kulshrestha ,  Amit Pabalkar ,  Arvind Gopalakrishnan ,  Justin Tai ,  Sachin Satish Idgunji

IPC分类号： G06F1/00 ,  G06F1/26 ,  G06F1/3206 ,  G06F9/50 ,  G06F1/3296 ,  G06F1/28 ,  G06N20/00 ,  G06N5/04

摘要： Integrated circuits, or computer chips, typically include multiple hardware components (e.g. memory, processors, etc.) operating under a shared power (e.g. thermal) constraint that is sourced by one or more power sources for the chip. Typically, the hardware components can be individually configured to operate at certain states (e.g. to operate at a certain frequency by setting a clock speed for a clock dedicated to the hardware component). Thus, each hardware component can be configured to operate at an operating point that is determined to be optimal, usually in terms of achieving some desired goal for a specific application (e.g. frame rates for gaming, etc.). In the context of chip hardware that operates under a shared power/thermal constraint, a method, computer readable medium, and system are provided for determining the optimal operating point for the chip that takes into consideration both performance of the chip and power consumption by the chip.

公开(公告)号：US10445243B2

公开(公告)日：2019-10-15

申请号：US14055356

申请日：2013-10-16

申请人： NVIDIA CORPORATION

发明人： Jerome F. Duluk, Jr. ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove ,  Chenghuan Jia ,  John Mashey

IPC分类号： G06F13/12 ,  G06F13/38 ,  G06F12/1009 ,  G06F12/109 ,  G06F12/1072 ,  G06F11/07 ,  G06F12/12 ,  G06F12/08 ,  G06F12/10

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US10303616B2

公开(公告)日：2019-05-28

申请号：US14055382

申请日：2013-10-16

申请人： NVIDIA Corporation

发明人： Jerome F. Duluk, Jr. ,  Chenghuan Jia ,  John Mashey ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove

IPC分类号： G06F13/12 ,  G06F13/38 ,  G06F12/1009 ,  G06F12/109 ,  G06F12/1072 ,  G06F11/07 ,  G06F12/12 ,  G06F12/08 ,  G06F12/10

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US11487673B2

公开(公告)日：2022-11-01

申请号：US14055345

申请日：2013-10-16

申请人： NVIDIA Corporation

发明人： Jerome F. Duluk, Jr. ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove ,  Chenghuan Jia ,  John Mashey

IPC分类号： G06F13/12 ,  G06F13/38 ,  G06F12/1009 ,  G06F12/109 ,  G06F12/1072 ,  G06F12/08 ,  G06F11/07 ,  G06F12/12 ,  G06F12/10

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20210294707A1

公开(公告)日：2021-09-23

申请号：US16825276

申请日：2020-03-20

申请人： NVIDIA Corporation

发明人： Jonathon Stuart Ramsay Evans ,  Naveen Cherukuri ,  Jerome Francis Duluk, JR. ,  Shailendra Singh ,  Vaibhav Vyas ,  Wishwesh Gandhi ,  Arvind Gopalakrishnan ,  Manas Mandal

IPC分类号： G06F11/20 ,  G06T1/20

摘要： Apparatuses, systems, and techniques to detect memory errors and isolate or migrate partitions on a parallel processing unit using an application programming interface to facilitate parallel computing, such as CUDA. In at least one embodiment, interrupts are intercepted and processed on a graphics processing unit indicating a memory error for one or more partitions, and a policy is applied to isolate that memory error from other partitions.

公开(公告)号：US09767036B2

公开(公告)日：2017-09-19

申请号：US14055318

申请日：2013-10-16

申请人： NVIDIA Corporation

发明人： Jerome F. Duluk, Jr. ,  Cameron Buschardt ,  Sherry Cheung ,  James Leroy Deming ,  Samuel H. Duncan ,  Lucien Dunning ,  Robert George ,  Arvind Gopalakrishnan ,  Mark Hairgrove ,  Chenghuan Jia ,  John Mashey

IPC分类号： G06F12/10 ,  G06F12/1009 ,  G06F12/109 ,  G06F12/1072 ,  G06F11/07 ,  G06F12/12 ,  G06F12/08

CPC分类号： G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

摘要： A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20160188251A1

公开(公告)日：2016-06-30

申请号：US14800684

申请日：2015-07-15

申请人： Nvidia Corporation

发明人： Lucien Dunning ,  Dwayne Swoboda ,  Arvind Gopalakrishnan ,  Cameron Buschardt

IPC分类号： G06F3/06 ,  G06F12/10

CPC分类号： G06F12/1009 ,  G06F12/109 ,  G06F12/1491 ,  G06F2212/1044 ,  G06F2212/152

摘要： Unified virtual memory (UVM) management techniques using page table sharing between user mode and kernel mode GPU address spaces and creating the notion of privileged level of data.

摘要翻译： 统一虚拟内存（UVM）管理技术，使用用户模式和内核模式之间的页表共享GPU地址空间，并创建特权数据级别的概念。