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    RAMP GENERATOR PROVIDING HIGH RESOLUTION FINE GAIN INCLUDING FRACTIONAL DIVIDER WITH DELTA-SIGMA MODULATOR
    1.
    发明申请
    RAMP GENERATOR PROVIDING HIGH RESOLUTION FINE GAIN INCLUDING FRACTIONAL DIVIDER WITH DELTA-SIGMA MODULATOR 有权

    公开(公告)号：US20210351768A1

    公开(公告)日：2021-11-11

    申请号：US16867399

    申请日：2020-05-05

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Lihang Fan ,  Liang Zuo ,  Nijun Jiang ,  Min Qu ,  Xuelian Liu

    IPC: H03K4/06 ,  H03M3/00 ,  H03M1/56 ,  H04N5/378

    Abstract: A ramp generator providing ramp signal with high resolution fine gain includes a current mirror having a first and second paths to conduct a capacitor current and an integrator current responsive to the capacitor current. First and second switched capacitor circuits are coupled to the first path. A fractional divider circuit is coupled to receive a clock signal to generate in response to an adjustable fractional divider ratio K a switched capacitor control signal that oscillates between first and second states to control the first and second switched capacitor circuits. The first and second switched capacitor circuits are coupled to be alternatingly charged by the capacitor current and discharged in response to each the switched capacitor control signal. An integrator coupled is to the second path to generate the ramp signal in response to the integrator current.

    IMAGE SENSOR FAR END DRIVER CIRCUITRY PROVIDING FAST SETTLING ROW CONTROL SIGNALS
    5.
    发明申请
    IMAGE SENSOR FAR END DRIVER CIRCUITRY PROVIDING FAST SETTLING ROW CONTROL SIGNALS 有权

    公开(公告)号：US20210152756A1

    公开(公告)日：2021-05-20

    申请号：US16685663

    申请日：2019-11-15

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Rui Wang ,  Hiroaki Ebihara ,  Zhiyong Zhan ,  Liang Zuo ,  Min Qu ,  Wanqing Xin ,  Xuelian Liu

    IPC: H04N5/341 ,  H04N5/351 ,  H04N5/378

    Abstract: An image sensor includes a pixel array with rows and columns of pixels. Each row of the pixel array has a first end that is opposite a second end of each row of the pixel array. Control circuitry is coupled to the first end of each row of the pixel array to provide control signals to each row of the pixel array from the first end of each row of the pixel array. Far end driver circuitry coupled to the second end of each row of the pixel array to selectively further drive from the second end of each row of the pixel array the control signals provided by the control circuitry from the first end of each row of the pixel array. The control circuitry is further coupled to provide far end control signals to the far end driver circuitry.

    Circuit and method for image artifact reduction in high-density, highpixel-count, image sensor with phase detection autofocus
    7.
    发明授权
    Circuit and method for image artifact reduction in high-density, highpixel-count, image sensor with phase detection autofocus 有权

    公开(公告)号：US11683604B1

    公开(公告)日：2023-06-20

    申请号：US17678533

    申请日：2022-02-23

    Applicant: OmniVision Technologies, Inc.

    Inventor： Liang Zuo ,  Rui Wang ,  Selcuk Sen ,  Xuelian Liu ,  Min Qu ,  Hiroaki Ebihara

    IPC: H04N25/704 ,  H04N25/11 ,  H04N25/60

    CPC classification number: H04N25/704 ,  H04N25/11 ,  H04N25/60

    Abstract: An image sensor includes an array of multiple-photodiode cells, each photodiode coupled through a selection transistor to a floating diffusion of the cell, the selection transistors controlled by respective transfer lines, a reset, a sense source follower, and a read transistor coupled from the source follower to a data line. The array includes phase detection rows with phase detection cells and normal cells; and a compensation row of more cells. In embodiments, each phase detection row has cells with at least one photodiode coupled to the floating diffusion by selection transistors controlled by a transfer line separate from transfer lines of selection transistors of adjacent normal cells of the row. In embodiments, the compensation row has cells with photodiodes coupled to the floating diffusion by selection transistors controlled by a transfer line separate from transfer lines of selection transistors of adjacent normal cells of the compensation row.

    Ramp generator providing high resolution fine gain including fractional divider with delta-sigma modulator
    8.
    发明授权
    Ramp generator providing high resolution fine gain including fractional divider with delta-sigma modulator 有权

    公开(公告)号：US11595030B2

    公开(公告)日：2023-02-28

    申请号：US16867399

    申请日：2020-05-05

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Lihang Fan ,  Liang Zuo ,  Nijun Jiang ,  Min Qu ,  Xuelian Liu

    IPC: H03K4/06 ,  H04N5/378 ,  H03M1/56 ,  H03M3/00

    Abstract: A ramp generator providing ramp signal with high resolution fine gain includes a current mirror having a first and second paths to conduct a capacitor current and an integrator current responsive to the capacitor current. First and second switched capacitor circuits are coupled to the first path. A fractional divider circuit is coupled to receive a clock signal to generate in response to an adjustable fractional divider ratio K a switched capacitor control signal that oscillates between first and second states to control the first and second switched capacitor circuits. The first and second switched capacitor circuits are coupled to be alternatingly charged by the capacitor current and discharged in response to each the switched capacitor control signal. An integrator coupled is to the second path to generate the ramp signal in response to the integrator current.

    Image sensor with frame level black level calibration
    9.
    发明授权
    Image sensor with frame level black level calibration 有权

    公开(公告)号：US11206392B1

    公开(公告)日：2021-12-21

    申请号：US16931194

    申请日：2020-07-16

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Liang Zuo ,  Min Qu ,  Xuelian Liu ,  Rui Wang ,  Zhe Gao ,  Zhiyong Zhan

    IPC: H04N17/00 ,  H04N5/3745 ,  H04N5/378

    Abstract: An image sensor includes a pixel array with active rows of pixel cells, a black level calibration row with black image data generation circuits coupled to generate black image data signals representative of an absence of the incident light, and a dummy row with black level clamping circuits coupled to receive a black sun reference voltage to clamp bitlines of the pixel array, and a black level calibration circuit coupled to receive the black sun reference voltage to generate a black sun calibration voltage. A black sun feedback circuit is coupled to generate the black sun reference voltage in response to the black sun calibration voltage and a black level sample reference, and a black level sampling circuit is coupled to the bitlines to sample the black image data signals to generate the black level sample reference received by the black sun feedback circuit.

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